73 lines
1.6 KiB
Plaintext
73 lines
1.6 KiB
Plaintext
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (C) 2019
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* Author(s): Giulio Benetti <giulio.benetti@benettiengineering.com>
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*/
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/dts-v1/;
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#include "imxrt1050.dtsi"
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#include "imxrt1050-pinfunc.h"
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/ {
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model = "NXP IMXRT1050-evk board";
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compatible = "fsl,imxrt1050-evk", "fsl,imxrt1050";
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chosen {
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stdout-path = &lpuart1;
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};
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aliases {
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gpio0 = &gpio1;
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gpio1 = &gpio2;
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gpio2 = &gpio3;
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gpio3 = &gpio4;
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gpio4 = &gpio5;
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mmc0 = &usdhc1;
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serial0 = &lpuart1;
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};
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memory@80000000 {
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device_type = "memory";
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reg = <0x80000000 0x2000000>;
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};
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};
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&lpuart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_lpuart1>;
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status = "okay";
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};
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&iomuxc {
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pinctrl-names = "default";
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pinctrl_lpuart1: lpuart1grp {
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fsl,pins = <
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MXRT1050_IOMUXC_GPIO_AD_B0_12_LPUART1_TXD 0xf1
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MXRT1050_IOMUXC_GPIO_AD_B0_13_LPUART1_RXD 0xf1
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>;
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};
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pinctrl_usdhc0: usdhc0grp {
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fsl,pins = <
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MXRT1050_IOMUXC_GPIO_B1_12_USDHC1_CD_B 0x1B000
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MXRT1050_IOMUXC_GPIO_B1_14_USDHC1_VSELECT 0xB069
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MXRT1050_IOMUXC_GPIO_SD_B0_00_USDHC1_CMD 0x17061
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MXRT1050_IOMUXC_GPIO_SD_B0_01_USDHC1_CLK 0x17061
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MXRT1050_IOMUXC_GPIO_SD_B0_05_USDHC1_DATA3 0x17061
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MXRT1050_IOMUXC_GPIO_SD_B0_04_USDHC1_DATA2 0x17061
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MXRT1050_IOMUXC_GPIO_SD_B0_03_USDHC1_DATA1 0x17061
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MXRT1050_IOMUXC_GPIO_SD_B0_02_USDHC1_DATA0 0x17061
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>;
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};
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};
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&usdhc1 {
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pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
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pinctrl-0 = <&pinctrl_usdhc0>;
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pinctrl-1 = <&pinctrl_usdhc0>;
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pinctrl-2 = <&pinctrl_usdhc0>;
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pinctrl-3 = <&pinctrl_usdhc0>;
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cd-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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