69 lines
2.0 KiB
Plaintext
69 lines
2.0 KiB
Plaintext
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2018 MOXA Inc. - https://www.moxa.com/
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*
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* Authors: SZ Lin (林上智) <sz.lin@moxa.com>
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* Wes Huang (黃淵河) <wes.huang@moxa.com>
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* Fero JD Zhou (周俊達) <FeroJD.Zhou@moxa.com>
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*/
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/dts-v1/;
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#include "am335x-moxa-uc-2100-common.dtsi"
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/ {
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model = "Moxa UC-2101";
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compatible = "moxa,uc-2101", "ti,am33xx";
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leds {
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compatible = "gpio-leds";
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led1 {
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label = "UC2100:GREEN:USER";
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gpios = <&gpio3 10 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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};
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};
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&am33xx_pinmux {
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pinctrl-names = "default";
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cpsw_default: cpsw_default {
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pinctrl-single,pins = <
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/* Slave 1 */
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AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT_PULLDOWN, MUX_MODE1) /* mii1_crs.rmii1_crs_dv */
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AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLUP, MUX_MODE1) /* mii1_rxerr.rmii1_rxerr */
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AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE1) /* mii1_txen.rmii1_txen */
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE1) /* mii1_txd1.rmii1_txd1 */
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AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE1) /* mii1_txd0.rmii1_txd0 */
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLUP, MUX_MODE1) /* mii1_rxd1.rmii1_rxd1 */
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AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLUP, MUX_MODE1) /* mii1_rxd0.rmii1_rxd0 */
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AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLDOWN, MUX_MODE0)
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>;
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};
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spi1_pins: pinmux_spi1 {
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pinctrl-single,pins = <
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AM33XX_PADCONF(AM335X_PIN_ECAP0_IN_PWM0_OUT, PIN_INPUT_PULLUP, MUX_MODE4) /* ecap0_in_pwm0_out.spi1_sclk */
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AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLUP, MUX_MODE4) /* uart1_ctsn.spi1_cs0 */
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AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_INPUT_PULLUP, MUX_MODE4) /* uart0_ctsn.spi1_d0 */
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AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_INPUT_PULLUP, MUX_MODE4) /* uart0_rtsn.spi1_d1 */
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>;
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};
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};
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&davinci_mdio_sw {
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phy0: ethernet-phy@4 {
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reg = <4>;
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};
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};
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&cpsw_port1 {
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phy-handle = <&phy0>;
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phy-mode = "rmii";
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};
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&cpsw_port2 {
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status = "disabled";
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};
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