102 lines
3.2 KiB
YAML
102 lines
3.2 KiB
YAML
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/virtio/pci-iommu.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: virtio-iommu device using the virtio-pci transport
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maintainers:
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- Jean-Philippe Brucker <jean-philippe@linaro.org>
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description: |
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When virtio-iommu uses the PCI transport, its programming interface is
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discovered dynamically by the PCI probing infrastructure. However the
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device tree statically describes the relation between IOMMU and DMA
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masters. Therefore, the PCI root complex that hosts the virtio-iommu
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contains a child node representing the IOMMU device explicitly.
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DMA from the IOMMU device isn't managed by another IOMMU. Therefore the
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virtio-iommu node doesn't have an "iommus" property, and is omitted from
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the iommu-map property of the root complex.
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properties:
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# If compatible is present, it should contain the vendor and device ID
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# according to the PCI Bus Binding specification. Since PCI provides
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# built-in identification methods, compatible is not actually required.
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compatible:
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oneOf:
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- items:
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- const: virtio,pci-iommu
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- const: pci1af4,1057
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- items:
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- const: pci1af4,1057
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reg:
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description: |
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PCI address of the IOMMU. As defined in the PCI Bus Binding
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reference, the reg property is a five-cell address encoded as (phys.hi
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phys.mid phys.lo size.hi size.lo). phys.hi should contain the device's
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BDF as 0b00000000 bbbbbbbb dddddfff 00000000. The other cells should be
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zero. See Documentation/devicetree/bindings/pci/pci.txt
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'#iommu-cells':
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const: 1
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required:
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- compatible
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- reg
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- '#iommu-cells'
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additionalProperties: false
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examples:
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- |
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bus {
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#address-cells = <2>;
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#size-cells = <2>;
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pcie@40000000 {
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device_type = "pci";
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#address-cells = <3>;
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#size-cells = <2>;
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reg = <0x0 0x40000000 0x0 0x1000000>;
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ranges = <0x02000000 0x0 0x41000000 0x0 0x41000000 0x0 0x0f000000>;
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/*
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* The IOMMU manages all functions in this PCI domain except
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* itself. Omit BDF 00:01.0.
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*/
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iommu-map = <0x0 &iommu0 0x0 0x8
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0x9 &iommu0 0x9 0xfff7>;
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/* The IOMMU programming interface uses slot 00:01.0 */
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iommu0: iommu@1,0 {
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compatible = "pci1af4,1057";
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reg = <0x800 0 0 0 0>;
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#iommu-cells = <1>;
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};
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};
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pcie@50000000 {
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device_type = "pci";
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#address-cells = <3>;
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#size-cells = <2>;
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reg = <0x0 0x50000000 0x0 0x1000000>;
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ranges = <0x02000000 0x0 0x51000000 0x0 0x51000000 0x0 0x0f000000>;
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/*
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* The IOMMU also manages all functions from this domain,
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* with endpoint IDs 0x10000 - 0x1ffff
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*/
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iommu-map = <0x0 &iommu0 0x10000 0x10000>;
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};
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ethernet {
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/* The IOMMU manages this platform device with endpoint ID 0x20000 */
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iommus = <&iommu0 0x20000>;
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};
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};
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...
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