97 lines
2.2 KiB
YAML
97 lines
2.2 KiB
YAML
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/spi/fsl,spi-fsl-qspi.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Freescale Quad Serial Peripheral Interface (QuadSPI)
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maintainers:
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- Han Xu <han.xu@nxp.com>
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allOf:
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- $ref: "spi-controller.yaml#"
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properties:
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compatible:
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oneOf:
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- enum:
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- fsl,vf610-qspi
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- fsl,imx6sx-qspi
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- fsl,imx7d-qspi
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- fsl,imx6ul-qspi
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- fsl,ls1021a-qspi
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- fsl,ls2080a-qspi
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- items:
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- enum:
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- fsl,ls1043a-qspi
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- const: fsl,ls1021a-qspi
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- items:
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- enum:
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- fsl,imx8mq-qspi
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- const: fsl,imx7d-qspi
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reg:
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items:
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- description: registers
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- description: memory mapping
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reg-names:
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items:
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- const: QuadSPI
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- const: QuadSPI-memory
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interrupts:
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maxItems: 1
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clocks:
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items:
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- description: SoC SPI qspi_en clock
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- description: SoC SPI qspi clock
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clock-names:
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items:
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- const: qspi_en
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- const: qspi
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required:
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- compatible
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- reg
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- reg-names
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- interrupts
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- clocks
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- clock-names
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/clock/fsl,qoriq-clockgen.h>
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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spi@1550000 {
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compatible = "fsl,ls1021a-qspi";
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reg = <0x0 0x1550000 0x0 0x100000>,
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<0x0 0x40000000 0x0 0x10000000>;
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reg-names = "QuadSPI", "QuadSPI-memory";
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interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(2)>,
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<&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(2)>;
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clock-names = "qspi_en", "qspi";
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flash@0 {
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compatible = "jedec,spi-nor";
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spi-max-frequency = <50000000>;
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reg = <0>;
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spi-rx-bus-width = <4>;
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spi-tx-bus-width = <4>;
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};
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};
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};
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