89 lines
2.9 KiB
Plaintext
89 lines
2.9 KiB
Plaintext
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NVIDIA Tegra30 AHUB (Audio Hub)
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Required properties:
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- compatible : For Tegra30, must contain "nvidia,tegra30-ahub". For Tegra114,
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must contain "nvidia,tegra114-ahub". For Tegra124, must contain
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"nvidia,tegra124-ahub". Otherwise, must contain "nvidia,<chip>-ahub",
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plus at least one of the above, where <chip> is tegra132.
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- reg : Should contain the register physical address and length for each of
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the AHUB's register blocks.
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- Tegra30 requires 2 entries, for the APBIF and AHUB/AUDIO register blocks.
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- Tegra114 requires an additional entry, for the APBIF2 register block.
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- interrupts : Should contain AHUB interrupt
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- clocks : Must contain an entry for each entry in clock-names.
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See ../clocks/clock-bindings.txt for details.
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- clock-names : Must include the following entries:
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- d_audio
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- apbif
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- resets : Must contain an entry for each entry in reset-names.
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See ../reset/reset.txt for details.
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- reset-names : Must include the following entries:
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Tegra30 and later:
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- d_audio
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- apbif
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- i2s0
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- i2s1
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- i2s2
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- i2s3
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- i2s4
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- dam0
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- dam1
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- dam2
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- spdif
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Tegra114 and later additionally require:
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- amx
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- adx
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Tegra124 and later additionally require:
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- amx1
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- adx1
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- afc0
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- afc1
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- afc2
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- afc3
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- afc4
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- afc5
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- ranges : The bus address mapping for the configlink register bus.
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Can be empty since the mapping is 1:1.
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- dmas : Must contain an entry for each entry in clock-names.
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See ../dma/dma.txt for details.
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- dma-names : Must include the following entries:
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- rx0 .. rx<n>
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- tx0 .. tx<n>
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... where n is:
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Tegra30: 3
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Tegra114, Tegra124: 9
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- #address-cells : For the configlink bus. Should be <1>;
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- #size-cells : For the configlink bus. Should be <1>.
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AHUB client modules need to specify the IDs of their CIFs (Client InterFaces).
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For RX CIFs, the numbers indicate the register number within AHUB routing
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register space (APBIF 0..3 RX, I2S 0..5 RX, DAM 0..2 RX 0..1, SPDIF RX 0..1).
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For TX CIFs, the numbers indicate the bit position within the AHUB routing
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registers (APBIF 0..3 TX, I2S 0..5 TX, DAM 0..2 TX, SPDIF TX 0..1).
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Example:
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ahub@70080000 {
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compatible = "nvidia,tegra30-ahub";
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reg = <0x70080000 0x200 0x70080200 0x100>;
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interrupts = < 0 103 0x04 >;
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nvidia,dma-request-selector = <&apbdma 1>;
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clocks = <&tegra_car 106>, <&tegra_car 107>;
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clock-names = "d_audio", "apbif";
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resets = <&tegra_car 106>, <&tegra_car 107>, <&tegra_car 30>,
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<&tegra_car 11>, <&tegra_car 18>, <&tegra_car 101>,
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<&tegra_car 102>, <&tegra_car 108>, <&tegra_car 109>,
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<&tegra_car 110>, <&tegra_car 10>;
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reset-names = "d_audio", "apbif", "i2s0", "i2s1", "i2s2",
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"i2s3", "i2s4", "dam0", "dam1", "dam2",
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"spdif";
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dmas = <&apbdma 1>, <&apbdma 1>;
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<&apbdma 2>, <&apbdma 2>;
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<&apbdma 3>, <&apbdma 3>;
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<&apbdma 4>, <&apbdma 4>;
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dma-names = "rx0", "tx0", "rx1", "tx1", "rx2", "tx2", "rx3", "tx3";
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ranges;
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#address-cells = <1>;
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#size-cells = <1>;
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};
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