92 lines
2.7 KiB
C
92 lines
2.7 KiB
C
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/* SPDX-License-Identifier: GPL-2.0-only */
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/****************************************************************************
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* Driver for Solarflare network controllers and boards
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* Copyright 2018 Solarflare Communications Inc.
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* Copyright 2019-2020 Xilinx Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation, incorporated herein by reference.
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*/
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#ifndef EFX_EF100_NIC_H
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#define EFX_EF100_NIC_H
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#include "net_driver.h"
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#include "nic_common.h"
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extern const struct efx_nic_type ef100_pf_nic_type;
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extern const struct efx_nic_type ef100_vf_nic_type;
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int ef100_probe_netdev_pf(struct efx_nic *efx);
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int ef100_probe_vf(struct efx_nic *efx);
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void ef100_remove(struct efx_nic *efx);
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enum {
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EF100_STAT_port_tx_bytes = GENERIC_STAT_COUNT,
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EF100_STAT_port_tx_packets,
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EF100_STAT_port_tx_pause,
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EF100_STAT_port_tx_unicast,
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EF100_STAT_port_tx_multicast,
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EF100_STAT_port_tx_broadcast,
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EF100_STAT_port_tx_lt64,
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EF100_STAT_port_tx_64,
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EF100_STAT_port_tx_65_to_127,
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EF100_STAT_port_tx_128_to_255,
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EF100_STAT_port_tx_256_to_511,
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EF100_STAT_port_tx_512_to_1023,
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EF100_STAT_port_tx_1024_to_15xx,
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EF100_STAT_port_tx_15xx_to_jumbo,
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EF100_STAT_port_rx_bytes,
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EF100_STAT_port_rx_packets,
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EF100_STAT_port_rx_good,
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EF100_STAT_port_rx_bad,
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EF100_STAT_port_rx_pause,
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EF100_STAT_port_rx_unicast,
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EF100_STAT_port_rx_multicast,
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EF100_STAT_port_rx_broadcast,
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EF100_STAT_port_rx_lt64,
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EF100_STAT_port_rx_64,
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EF100_STAT_port_rx_65_to_127,
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EF100_STAT_port_rx_128_to_255,
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EF100_STAT_port_rx_256_to_511,
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EF100_STAT_port_rx_512_to_1023,
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EF100_STAT_port_rx_1024_to_15xx,
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EF100_STAT_port_rx_15xx_to_jumbo,
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EF100_STAT_port_rx_gtjumbo,
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EF100_STAT_port_rx_bad_gtjumbo,
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EF100_STAT_port_rx_align_error,
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EF100_STAT_port_rx_length_error,
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EF100_STAT_port_rx_overflow,
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EF100_STAT_port_rx_nodesc_drops,
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EF100_STAT_COUNT
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};
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struct ef100_nic_data {
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struct efx_nic *efx;
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struct efx_buffer mcdi_buf;
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u32 datapath_caps;
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u32 datapath_caps2;
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u32 datapath_caps3;
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unsigned int pf_index;
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u16 warm_boot_count;
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u8 port_id[ETH_ALEN];
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DECLARE_BITMAP(evq_phases, EFX_MAX_CHANNELS);
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u64 stats[EF100_STAT_COUNT];
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u32 base_mport;
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bool have_mport; /* base_mport was populated successfully */
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bool grp_mae; /* MAE Privilege */
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u16 tso_max_hdr_len;
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u16 tso_max_payload_num_segs;
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u16 tso_max_frames;
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unsigned int tso_max_payload_len;
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};
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#define efx_ef100_has_cap(caps, flag) \
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(!!((caps) & BIT_ULL(MC_CMD_GET_CAPABILITIES_V4_OUT_ ## flag ## _LBN)))
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int efx_ef100_init_datapath_caps(struct efx_nic *efx);
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int ef100_phy_probe(struct efx_nic *efx);
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int ef100_filter_table_probe(struct efx_nic *efx);
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#endif /* EFX_EF100_NIC_H */
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