257 lines
5.9 KiB
C
257 lines
5.9 KiB
C
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/* SPDX-License-Identifier: (GPL-2.0 OR MIT)
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* Google virtual Ethernet (gve) driver
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*
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* Copyright (C) 2015-2021 Google, Inc.
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*/
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/* GVE DQO Descriptor formats */
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#ifndef _GVE_DESC_DQO_H_
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#define _GVE_DESC_DQO_H_
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#include <linux/build_bug.h>
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#define GVE_TX_MAX_HDR_SIZE_DQO 255
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#define GVE_TX_MIN_TSO_MSS_DQO 88
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#ifndef __LITTLE_ENDIAN_BITFIELD
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#error "Only little endian supported"
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#endif
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/* Basic TX descriptor (DTYPE 0x0C) */
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struct gve_tx_pkt_desc_dqo {
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__le64 buf_addr;
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/* Must be GVE_TX_PKT_DESC_DTYPE_DQO (0xc) */
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u8 dtype: 5;
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/* Denotes the last descriptor of a packet. */
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u8 end_of_packet: 1;
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u8 checksum_offload_enable: 1;
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/* If set, will generate a descriptor completion for this descriptor. */
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u8 report_event: 1;
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u8 reserved0;
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__le16 reserved1;
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/* The TX completion associated with this packet will contain this tag.
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*/
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__le16 compl_tag;
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u16 buf_size: 14;
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u16 reserved2: 2;
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} __packed;
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static_assert(sizeof(struct gve_tx_pkt_desc_dqo) == 16);
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#define GVE_TX_PKT_DESC_DTYPE_DQO 0xc
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#define GVE_TX_MAX_BUF_SIZE_DQO ((16 * 1024) - 1)
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/* Maximum number of data descriptors allowed per packet, or per-TSO segment. */
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#define GVE_TX_MAX_DATA_DESCS 10
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/* Min gap between tail and head to avoid cacheline overlap */
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#define GVE_TX_MIN_DESC_PREVENT_CACHE_OVERLAP 4
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/* "report_event" on TX packet descriptors may only be reported on the last
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* descriptor of a TX packet, and they must be spaced apart with at least this
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* value.
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*/
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#define GVE_TX_MIN_RE_INTERVAL 32
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struct gve_tx_context_cmd_dtype {
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u8 dtype: 5;
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u8 tso: 1;
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u8 reserved1: 2;
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u8 reserved2;
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};
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static_assert(sizeof(struct gve_tx_context_cmd_dtype) == 2);
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/* TX Native TSO Context DTYPE (0x05)
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*
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* "flex" fields allow the driver to send additional packet context to HW.
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*/
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struct gve_tx_tso_context_desc_dqo {
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/* The L4 payload bytes that should be segmented. */
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u32 tso_total_len: 24;
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u32 flex10: 8;
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/* Max segment size in TSO excluding headers. */
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u16 mss: 14;
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u16 reserved: 2;
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u8 header_len; /* Header length to use for TSO offload */
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u8 flex11;
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struct gve_tx_context_cmd_dtype cmd_dtype;
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u8 flex0;
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u8 flex5;
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u8 flex6;
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u8 flex7;
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u8 flex8;
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u8 flex9;
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} __packed;
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static_assert(sizeof(struct gve_tx_tso_context_desc_dqo) == 16);
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#define GVE_TX_TSO_CTX_DESC_DTYPE_DQO 0x5
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/* General context descriptor for sending metadata. */
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struct gve_tx_general_context_desc_dqo {
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u8 flex4;
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u8 flex5;
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u8 flex6;
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u8 flex7;
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u8 flex8;
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u8 flex9;
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u8 flex10;
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u8 flex11;
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struct gve_tx_context_cmd_dtype cmd_dtype;
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u16 reserved;
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u8 flex0;
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u8 flex1;
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u8 flex2;
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u8 flex3;
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} __packed;
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static_assert(sizeof(struct gve_tx_general_context_desc_dqo) == 16);
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#define GVE_TX_GENERAL_CTX_DESC_DTYPE_DQO 0x4
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/* Logical structure of metadata which is packed into context descriptor flex
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* fields.
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*/
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struct gve_tx_metadata_dqo {
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union {
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struct {
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u8 version;
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/* If `skb->l4_hash` is set, this value should be
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* derived from `skb->hash`.
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*
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* A zero value means no l4_hash was associated with the
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* skb.
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*/
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u16 path_hash: 15;
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/* Should be set to 1 if the flow associated with the
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* skb had a rehash from the TCP stack.
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*/
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u16 rehash_event: 1;
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} __packed;
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u8 bytes[12];
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};
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} __packed;
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static_assert(sizeof(struct gve_tx_metadata_dqo) == 12);
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#define GVE_TX_METADATA_VERSION_DQO 0
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/* TX completion descriptor */
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struct gve_tx_compl_desc {
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/* For types 0-4 this is the TX queue ID associated with this
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* completion.
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*/
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u16 id: 11;
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/* See: GVE_COMPL_TYPE_DQO* */
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u16 type: 3;
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u16 reserved0: 1;
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/* Flipped by HW to notify the descriptor is populated. */
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u16 generation: 1;
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union {
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/* For descriptor completions, this is the last index fetched
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* by HW + 1.
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*/
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__le16 tx_head;
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/* For packet completions, this is the completion tag set on the
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* TX packet descriptors.
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*/
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__le16 completion_tag;
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};
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__le32 reserved1;
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} __packed;
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static_assert(sizeof(struct gve_tx_compl_desc) == 8);
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#define GVE_COMPL_TYPE_DQO_PKT 0x2 /* Packet completion */
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#define GVE_COMPL_TYPE_DQO_DESC 0x4 /* Descriptor completion */
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#define GVE_COMPL_TYPE_DQO_MISS 0x1 /* Miss path completion */
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#define GVE_COMPL_TYPE_DQO_REINJECTION 0x3 /* Re-injection completion */
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/* Descriptor to post buffers to HW on buffer queue. */
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struct gve_rx_desc_dqo {
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__le16 buf_id; /* ID returned in Rx completion descriptor */
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__le16 reserved0;
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__le32 reserved1;
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__le64 buf_addr; /* DMA address of the buffer */
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__le64 header_buf_addr;
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__le64 reserved2;
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} __packed;
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static_assert(sizeof(struct gve_rx_desc_dqo) == 32);
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/* Descriptor for HW to notify SW of new packets received on RX queue. */
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struct gve_rx_compl_desc_dqo {
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/* Must be 1 */
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u8 rxdid: 4;
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u8 reserved0: 4;
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/* Packet originated from this system rather than the network. */
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u8 loopback: 1;
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/* Set when IPv6 packet contains a destination options header or routing
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* header.
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*/
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u8 ipv6_ex_add: 1;
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/* Invalid packet was received. */
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u8 rx_error: 1;
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u8 reserved1: 5;
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u16 packet_type: 10;
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u16 ip_hdr_err: 1;
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u16 udp_len_err: 1;
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u16 raw_cs_invalid: 1;
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u16 reserved2: 3;
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u16 packet_len: 14;
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/* Flipped by HW to notify the descriptor is populated. */
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u16 generation: 1;
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/* Should be zero. */
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u16 buffer_queue_id: 1;
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u16 header_len: 10;
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u16 rsc: 1;
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u16 split_header: 1;
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u16 reserved3: 4;
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u8 descriptor_done: 1;
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u8 end_of_packet: 1;
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u8 header_buffer_overflow: 1;
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u8 l3_l4_processed: 1;
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u8 csum_ip_err: 1;
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u8 csum_l4_err: 1;
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u8 csum_external_ip_err: 1;
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u8 csum_external_udp_err: 1;
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u8 status_error1;
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__le16 reserved5;
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__le16 buf_id; /* Buffer ID which was sent on the buffer queue. */
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union {
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/* Packet checksum. */
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__le16 raw_cs;
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/* Segment length for RSC packets. */
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__le16 rsc_seg_len;
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};
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__le32 hash;
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__le32 reserved6;
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__le64 reserved7;
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} __packed;
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static_assert(sizeof(struct gve_rx_compl_desc_dqo) == 32);
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/* Ringing the doorbell too often can hurt performance.
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*
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* HW requires this value to be at least 8.
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*/
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#define GVE_RX_BUF_THRESH_DQO 32
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#endif /* _GVE_DESC_DQO_H_ */
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