355 lines
8.7 KiB
C
355 lines
8.7 KiB
C
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/*
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* Copyright (c) 2005-2008 Chelsio, Inc. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#include "common.h"
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#include "regs.h"
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enum {
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/* MDIO_DEV_PMA_PMD registers */
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AQ_LINK_STAT = 0xe800,
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AQ_IMASK_PMA = 0xf000,
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/* MDIO_DEV_XGXS registers */
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AQ_XAUI_RX_CFG = 0xc400,
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AQ_XAUI_TX_CFG = 0xe400,
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/* MDIO_DEV_ANEG registers */
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AQ_1G_CTRL = 0xc400,
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AQ_ANEG_STAT = 0xc800,
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/* MDIO_DEV_VEND1 registers */
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AQ_FW_VERSION = 0x0020,
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AQ_IFLAG_GLOBAL = 0xfc00,
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AQ_IMASK_GLOBAL = 0xff00,
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};
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enum {
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IMASK_PMA = 1 << 2,
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IMASK_GLOBAL = 1 << 15,
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ADV_1G_FULL = 1 << 15,
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ADV_1G_HALF = 1 << 14,
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ADV_10G_FULL = 1 << 12,
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AQ_RESET = (1 << 14) | (1 << 15),
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AQ_LOWPOWER = 1 << 12,
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};
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static int aq100x_reset(struct cphy *phy, int wait)
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{
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/*
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* Ignore the caller specified wait time; always wait for the reset to
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* complete. Can take up to 3s.
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*/
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int err = t3_phy_reset(phy, MDIO_MMD_VEND1, 3000);
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if (err)
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CH_WARN(phy->adapter, "PHY%d: reset failed (0x%x).\n",
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phy->mdio.prtad, err);
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return err;
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}
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static int aq100x_intr_enable(struct cphy *phy)
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{
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int err = t3_mdio_write(phy, MDIO_MMD_PMAPMD, AQ_IMASK_PMA, IMASK_PMA);
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if (err)
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return err;
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err = t3_mdio_write(phy, MDIO_MMD_VEND1, AQ_IMASK_GLOBAL, IMASK_GLOBAL);
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return err;
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}
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static int aq100x_intr_disable(struct cphy *phy)
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{
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return t3_mdio_write(phy, MDIO_MMD_VEND1, AQ_IMASK_GLOBAL, 0);
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}
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static int aq100x_intr_clear(struct cphy *phy)
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{
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unsigned int v;
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t3_mdio_read(phy, MDIO_MMD_VEND1, AQ_IFLAG_GLOBAL, &v);
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t3_mdio_read(phy, MDIO_MMD_PMAPMD, MDIO_STAT1, &v);
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return 0;
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}
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static int aq100x_intr_handler(struct cphy *phy)
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{
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int err;
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unsigned int cause, v;
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err = t3_mdio_read(phy, MDIO_MMD_VEND1, AQ_IFLAG_GLOBAL, &cause);
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if (err)
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return err;
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/* Read (and reset) the latching version of the status */
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t3_mdio_read(phy, MDIO_MMD_PMAPMD, MDIO_STAT1, &v);
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return cphy_cause_link_change;
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}
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static int aq100x_power_down(struct cphy *phy, int off)
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{
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return mdio_set_flag(&phy->mdio, phy->mdio.prtad,
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MDIO_MMD_PMAPMD, MDIO_CTRL1,
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MDIO_CTRL1_LPOWER, off);
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}
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static int aq100x_autoneg_enable(struct cphy *phy)
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{
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int err;
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err = aq100x_power_down(phy, 0);
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if (!err)
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err = mdio_set_flag(&phy->mdio, phy->mdio.prtad,
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MDIO_MMD_AN, MDIO_CTRL1,
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BMCR_ANENABLE | BMCR_ANRESTART, 1);
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return err;
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}
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static int aq100x_autoneg_restart(struct cphy *phy)
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{
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int err;
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err = aq100x_power_down(phy, 0);
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if (!err)
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err = mdio_set_flag(&phy->mdio, phy->mdio.prtad,
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MDIO_MMD_AN, MDIO_CTRL1,
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BMCR_ANENABLE | BMCR_ANRESTART, 1);
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return err;
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}
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static int aq100x_advertise(struct cphy *phy, unsigned int advertise_map)
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{
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unsigned int adv;
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int err;
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/* 10G advertisement */
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adv = 0;
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if (advertise_map & ADVERTISED_10000baseT_Full)
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adv |= ADV_10G_FULL;
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err = t3_mdio_change_bits(phy, MDIO_MMD_AN, MDIO_AN_10GBT_CTRL,
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ADV_10G_FULL, adv);
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if (err)
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return err;
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/* 1G advertisement */
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adv = 0;
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if (advertise_map & ADVERTISED_1000baseT_Full)
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adv |= ADV_1G_FULL;
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if (advertise_map & ADVERTISED_1000baseT_Half)
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adv |= ADV_1G_HALF;
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err = t3_mdio_change_bits(phy, MDIO_MMD_AN, AQ_1G_CTRL,
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ADV_1G_FULL | ADV_1G_HALF, adv);
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if (err)
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return err;
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/* 100M, pause advertisement */
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adv = 0;
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if (advertise_map & ADVERTISED_100baseT_Half)
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adv |= ADVERTISE_100HALF;
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if (advertise_map & ADVERTISED_100baseT_Full)
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adv |= ADVERTISE_100FULL;
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if (advertise_map & ADVERTISED_Pause)
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adv |= ADVERTISE_PAUSE_CAP;
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if (advertise_map & ADVERTISED_Asym_Pause)
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adv |= ADVERTISE_PAUSE_ASYM;
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err = t3_mdio_change_bits(phy, MDIO_MMD_AN, MDIO_AN_ADVERTISE,
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0xfe0, adv);
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return err;
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}
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static int aq100x_set_loopback(struct cphy *phy, int mmd, int dir, int enable)
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{
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return mdio_set_flag(&phy->mdio, phy->mdio.prtad,
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MDIO_MMD_PMAPMD, MDIO_CTRL1,
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BMCR_LOOPBACK, enable);
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}
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static int aq100x_set_speed_duplex(struct cphy *phy, int speed, int duplex)
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{
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/* no can do */
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return -1;
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}
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static int aq100x_get_link_status(struct cphy *phy, int *link_ok,
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int *speed, int *duplex, int *fc)
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{
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int err;
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unsigned int v;
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if (link_ok) {
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err = t3_mdio_read(phy, MDIO_MMD_PMAPMD, AQ_LINK_STAT, &v);
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if (err)
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return err;
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*link_ok = v & 1;
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if (!*link_ok)
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return 0;
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}
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err = t3_mdio_read(phy, MDIO_MMD_AN, AQ_ANEG_STAT, &v);
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if (err)
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return err;
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if (speed) {
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switch (v & 0x6) {
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case 0x6:
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*speed = SPEED_10000;
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break;
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case 0x4:
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*speed = SPEED_1000;
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break;
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case 0x2:
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*speed = SPEED_100;
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break;
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case 0x0:
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*speed = SPEED_10;
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break;
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}
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}
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if (duplex)
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*duplex = v & 1 ? DUPLEX_FULL : DUPLEX_HALF;
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return 0;
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}
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static const struct cphy_ops aq100x_ops = {
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.reset = aq100x_reset,
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.intr_enable = aq100x_intr_enable,
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.intr_disable = aq100x_intr_disable,
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.intr_clear = aq100x_intr_clear,
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.intr_handler = aq100x_intr_handler,
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.autoneg_enable = aq100x_autoneg_enable,
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.autoneg_restart = aq100x_autoneg_restart,
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.advertise = aq100x_advertise,
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.set_loopback = aq100x_set_loopback,
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.set_speed_duplex = aq100x_set_speed_duplex,
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.get_link_status = aq100x_get_link_status,
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.power_down = aq100x_power_down,
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.mmds = MDIO_DEVS_PMAPMD | MDIO_DEVS_PCS | MDIO_DEVS_PHYXS,
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};
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int t3_aq100x_phy_prep(struct cphy *phy, struct adapter *adapter, int phy_addr,
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const struct mdio_ops *mdio_ops)
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{
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unsigned int v, v2, gpio, wait;
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int err;
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cphy_init(phy, adapter, phy_addr, &aq100x_ops, mdio_ops,
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SUPPORTED_1000baseT_Full | SUPPORTED_10000baseT_Full |
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SUPPORTED_TP | SUPPORTED_Autoneg | SUPPORTED_AUI,
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"1000/10GBASE-T");
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/*
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* The PHY has been out of reset ever since the system powered up. So
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* we do a hard reset over here.
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*/
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gpio = phy_addr ? F_GPIO10_OUT_VAL : F_GPIO6_OUT_VAL;
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t3_set_reg_field(adapter, A_T3DBG_GPIO_EN, gpio, 0);
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msleep(1);
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t3_set_reg_field(adapter, A_T3DBG_GPIO_EN, gpio, gpio);
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/*
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* Give it enough time to load the firmware and get ready for mdio.
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*/
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msleep(1000);
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wait = 500; /* in 10ms increments */
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do {
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err = t3_mdio_read(phy, MDIO_MMD_VEND1, MDIO_CTRL1, &v);
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if (err || v == 0xffff) {
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/* Allow prep_adapter to succeed when ffff is read */
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CH_WARN(adapter, "PHY%d: reset failed (0x%x, 0x%x).\n",
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phy_addr, err, v);
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goto done;
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}
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v &= AQ_RESET;
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if (v)
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msleep(10);
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} while (v && --wait);
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if (v) {
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CH_WARN(adapter, "PHY%d: reset timed out (0x%x).\n",
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phy_addr, v);
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goto done; /* let prep_adapter succeed */
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}
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/* Datasheet says 3s max but this has been observed */
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wait = (500 - wait) * 10 + 1000;
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if (wait > 3000)
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CH_WARN(adapter, "PHY%d: reset took %ums\n", phy_addr, wait);
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/* Firmware version check. */
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t3_mdio_read(phy, MDIO_MMD_VEND1, AQ_FW_VERSION, &v);
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if (v != 101)
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CH_WARN(adapter, "PHY%d: unsupported firmware %d\n",
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phy_addr, v);
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/*
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* The PHY should start in really-low-power mode. Prepare it for normal
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* operations.
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*/
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err = t3_mdio_read(phy, MDIO_MMD_VEND1, MDIO_CTRL1, &v);
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if (err)
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return err;
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if (v & AQ_LOWPOWER) {
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err = t3_mdio_change_bits(phy, MDIO_MMD_VEND1, MDIO_CTRL1,
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AQ_LOWPOWER, 0);
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if (err)
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return err;
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msleep(10);
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} else
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CH_WARN(adapter, "PHY%d does not start in low power mode.\n",
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phy_addr);
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/*
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* Verify XAUI settings, but let prep succeed no matter what.
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*/
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v = v2 = 0;
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t3_mdio_read(phy, MDIO_MMD_PHYXS, AQ_XAUI_RX_CFG, &v);
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t3_mdio_read(phy, MDIO_MMD_PHYXS, AQ_XAUI_TX_CFG, &v2);
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if (v != 0x1b || v2 != 0x1b)
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CH_WARN(adapter,
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"PHY%d: incorrect XAUI settings (0x%x, 0x%x).\n",
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phy_addr, v, v2);
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done:
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return err;
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}
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