601 lines
17 KiB
C
601 lines
17 KiB
C
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright 2020 HabanaLabs, Ltd.
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* All Rights Reserved.
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*/
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#include "habanalabs.h"
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/**
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* hl_get_pb_block - return the relevant block within the block array
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*
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* @hdev: pointer to hl_device structure
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* @mm_reg_addr: register address in the desired block
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* @pb_blocks: blocks array
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* @array_size: blocks array size
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*
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*/
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static int hl_get_pb_block(struct hl_device *hdev, u32 mm_reg_addr,
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const u32 pb_blocks[], int array_size)
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{
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int i;
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u32 start_addr, end_addr;
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for (i = 0 ; i < array_size ; i++) {
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start_addr = pb_blocks[i];
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end_addr = start_addr + HL_BLOCK_SIZE;
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if ((mm_reg_addr >= start_addr) && (mm_reg_addr < end_addr))
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return i;
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}
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dev_err(hdev->dev, "No protection domain was found for 0x%x\n",
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mm_reg_addr);
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return -EDOM;
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}
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/**
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* hl_unset_pb_in_block - clear a specific protection bit in a block
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*
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* @hdev: pointer to hl_device structure
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* @reg_offset: register offset will be converted to bit offset in pb block
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* @sgs_entry: pb array
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*
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*/
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static int hl_unset_pb_in_block(struct hl_device *hdev, u32 reg_offset,
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struct hl_block_glbl_sec *sgs_entry)
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{
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if ((reg_offset >= HL_BLOCK_SIZE) || (reg_offset & 0x3)) {
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dev_err(hdev->dev,
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"Register offset(%d) is out of range(%d) or invalid\n",
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reg_offset, HL_BLOCK_SIZE);
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return -EINVAL;
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}
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UNSET_GLBL_SEC_BIT(sgs_entry->sec_array,
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(reg_offset & (HL_BLOCK_SIZE - 1)) >> 2);
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return 0;
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}
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/**
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* hl_unsecure_register - locate the relevant block for this register and
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* remove corresponding protection bit
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*
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* @hdev: pointer to hl_device structure
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* @mm_reg_addr: register address to unsecure
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* @offset: additional offset to the register address
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* @pb_blocks: blocks array
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* @sgs_array: pb array
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* @array_size: blocks array size
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*
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*/
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int hl_unsecure_register(struct hl_device *hdev, u32 mm_reg_addr, int offset,
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const u32 pb_blocks[], struct hl_block_glbl_sec sgs_array[],
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int array_size)
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{
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u32 reg_offset;
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int block_num;
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block_num = hl_get_pb_block(hdev, mm_reg_addr + offset, pb_blocks,
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array_size);
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if (block_num < 0)
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return block_num;
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reg_offset = (mm_reg_addr + offset) - pb_blocks[block_num];
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return hl_unset_pb_in_block(hdev, reg_offset, &sgs_array[block_num]);
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}
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/**
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* hl_unsecure_register_range - locate the relevant block for this register
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* range and remove corresponding protection bit
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*
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* @hdev: pointer to hl_device structure
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* @mm_reg_range: register address range to unsecure
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* @offset: additional offset to the register address
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* @pb_blocks: blocks array
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* @sgs_array: pb array
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* @array_size: blocks array size
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*
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*/
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static int hl_unsecure_register_range(struct hl_device *hdev,
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struct range mm_reg_range, int offset, const u32 pb_blocks[],
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struct hl_block_glbl_sec sgs_array[],
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int array_size)
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{
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u32 reg_offset;
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int i, block_num, rc = 0;
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block_num = hl_get_pb_block(hdev,
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mm_reg_range.start + offset, pb_blocks,
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array_size);
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if (block_num < 0)
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return block_num;
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for (i = mm_reg_range.start ; i <= mm_reg_range.end ; i += 4) {
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reg_offset = (i + offset) - pb_blocks[block_num];
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rc |= hl_unset_pb_in_block(hdev, reg_offset,
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&sgs_array[block_num]);
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}
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return rc;
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}
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/**
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* hl_unsecure_registers - locate the relevant block for all registers and
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* remove corresponding protection bit
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*
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* @hdev: pointer to hl_device structure
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* @mm_reg_array: register address array to unsecure
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* @mm_array_size: register array size
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* @offset: additional offset to the register address
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* @pb_blocks: blocks array
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* @sgs_array: pb array
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* @blocks_array_size: blocks array size
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*
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*/
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int hl_unsecure_registers(struct hl_device *hdev, const u32 mm_reg_array[],
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int mm_array_size, int offset, const u32 pb_blocks[],
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struct hl_block_glbl_sec sgs_array[], int blocks_array_size)
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{
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int i, rc = 0;
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for (i = 0 ; i < mm_array_size ; i++) {
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rc = hl_unsecure_register(hdev, mm_reg_array[i], offset,
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pb_blocks, sgs_array, blocks_array_size);
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if (rc)
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return rc;
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}
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return rc;
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}
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/**
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* hl_unsecure_registers_range - locate the relevant block for all register
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* ranges and remove corresponding protection bit
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*
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* @hdev: pointer to hl_device structure
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* @mm_reg_range_array: register address range array to unsecure
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* @mm_array_size: register array size
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* @offset: additional offset to the register address
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* @pb_blocks: blocks array
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* @sgs_array: pb array
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* @blocks_array_size: blocks array size
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*
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*/
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static int hl_unsecure_registers_range(struct hl_device *hdev,
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const struct range mm_reg_range_array[], int mm_array_size,
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int offset, const u32 pb_blocks[],
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struct hl_block_glbl_sec sgs_array[], int blocks_array_size)
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{
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int i, rc = 0;
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for (i = 0 ; i < mm_array_size ; i++) {
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rc = hl_unsecure_register_range(hdev, mm_reg_range_array[i],
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offset, pb_blocks, sgs_array, blocks_array_size);
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if (rc)
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return rc;
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}
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return rc;
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}
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/**
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* hl_ack_pb_security_violations - Ack security violation
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*
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* @hdev: pointer to hl_device structure
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* @pb_blocks: blocks array
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* @block_offset: additional offset to the block
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* @array_size: blocks array size
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*
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*/
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static void hl_ack_pb_security_violations(struct hl_device *hdev,
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const u32 pb_blocks[], u32 block_offset, int array_size)
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{
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int i;
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u32 cause, addr, block_base;
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for (i = 0 ; i < array_size ; i++) {
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block_base = pb_blocks[i] + block_offset;
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cause = RREG32(block_base + HL_BLOCK_GLBL_ERR_CAUSE);
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if (cause) {
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addr = RREG32(block_base + HL_BLOCK_GLBL_ERR_ADDR);
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hdev->asic_funcs->pb_print_security_errors(hdev,
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block_base, cause, addr);
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WREG32(block_base + HL_BLOCK_GLBL_ERR_CAUSE, cause);
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}
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}
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}
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/**
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* hl_config_glbl_sec - set pb in HW according to given pb array
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*
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* @hdev: pointer to hl_device structure
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* @pb_blocks: blocks array
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* @sgs_array: pb array
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* @block_offset: additional offset to the block
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* @array_size: blocks array size
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*
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*/
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void hl_config_glbl_sec(struct hl_device *hdev, const u32 pb_blocks[],
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struct hl_block_glbl_sec sgs_array[], u32 block_offset,
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int array_size)
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{
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int i, j;
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u32 sgs_base;
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if (hdev->pldm)
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usleep_range(100, 1000);
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for (i = 0 ; i < array_size ; i++) {
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sgs_base = block_offset + pb_blocks[i] +
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HL_BLOCK_GLBL_SEC_OFFS;
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for (j = 0 ; j < HL_BLOCK_GLBL_SEC_LEN ; j++)
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WREG32(sgs_base + j * sizeof(u32),
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sgs_array[i].sec_array[j]);
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}
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}
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/**
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* hl_secure_block - locally memsets a block to 0
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*
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* @hdev: pointer to hl_device structure
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* @sgs_array: pb array to clear
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* @array_size: blocks array size
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*
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*/
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void hl_secure_block(struct hl_device *hdev,
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struct hl_block_glbl_sec sgs_array[], int array_size)
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{
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int i;
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for (i = 0 ; i < array_size ; i++)
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memset((char *)(sgs_array[i].sec_array), 0,
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HL_BLOCK_GLBL_SEC_SIZE);
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}
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/**
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* hl_init_pb_with_mask - set selected pb instances with mask in HW according
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* to given configuration
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*
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* @hdev: pointer to hl_device structure
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* @num_dcores: number of decores to apply configuration to
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* set to HL_PB_SHARED if need to apply only once
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* @dcore_offset: offset between dcores
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* @num_instances: number of instances to apply configuration to
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* @instance_offset: offset between instances
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* @pb_blocks: blocks array
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* @blocks_array_size: blocks array size
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* @regs_array: register array
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* @regs_array_size: register array size
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* @mask: enabled instances mask: 1- enabled, 0- disabled
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*/
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int hl_init_pb_with_mask(struct hl_device *hdev, u32 num_dcores,
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u32 dcore_offset, u32 num_instances, u32 instance_offset,
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const u32 pb_blocks[], u32 blocks_array_size,
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const u32 *regs_array, u32 regs_array_size, u64 mask)
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{
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int i, j;
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struct hl_block_glbl_sec *glbl_sec;
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glbl_sec = kcalloc(blocks_array_size,
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sizeof(struct hl_block_glbl_sec),
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GFP_KERNEL);
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if (!glbl_sec)
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return -ENOMEM;
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hl_secure_block(hdev, glbl_sec, blocks_array_size);
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hl_unsecure_registers(hdev, regs_array, regs_array_size, 0, pb_blocks,
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glbl_sec, blocks_array_size);
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/* Fill all blocks with the same configuration */
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for (i = 0 ; i < num_dcores ; i++) {
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for (j = 0 ; j < num_instances ; j++) {
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int seq = i * num_instances + j;
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if (!(mask & BIT_ULL(seq)))
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continue;
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hl_config_glbl_sec(hdev, pb_blocks, glbl_sec,
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i * dcore_offset + j * instance_offset,
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blocks_array_size);
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}
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}
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kfree(glbl_sec);
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return 0;
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}
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/**
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* hl_init_pb - set pb in HW according to given configuration
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*
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* @hdev: pointer to hl_device structure
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* @num_dcores: number of decores to apply configuration to
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* set to HL_PB_SHARED if need to apply only once
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* @dcore_offset: offset between dcores
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* @num_instances: number of instances to apply configuration to
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* @instance_offset: offset between instances
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* @pb_blocks: blocks array
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* @blocks_array_size: blocks array size
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* @regs_array: register array
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* @regs_array_size: register array size
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*
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*/
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int hl_init_pb(struct hl_device *hdev, u32 num_dcores, u32 dcore_offset,
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u32 num_instances, u32 instance_offset,
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const u32 pb_blocks[], u32 blocks_array_size,
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const u32 *regs_array, u32 regs_array_size)
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{
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return hl_init_pb_with_mask(hdev, num_dcores, dcore_offset,
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num_instances, instance_offset, pb_blocks,
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blocks_array_size, regs_array, regs_array_size,
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ULLONG_MAX);
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}
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/**
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* hl_init_pb_ranges_with_mask - set pb instances using mask in HW according to
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* given configuration unsecurring registers
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* ranges instead of specific registers
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*
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* @hdev: pointer to hl_device structure
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* @num_dcores: number of decores to apply configuration to
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* set to HL_PB_SHARED if need to apply only once
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* @dcore_offset: offset between dcores
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* @num_instances: number of instances to apply configuration to
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* @instance_offset: offset between instances
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* @pb_blocks: blocks array
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* @blocks_array_size: blocks array size
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* @regs_range_array: register range array
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* @regs_range_array_size: register range array size
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* @mask: enabled instances mask: 1- enabled, 0- disabled
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*/
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int hl_init_pb_ranges_with_mask(struct hl_device *hdev, u32 num_dcores,
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u32 dcore_offset, u32 num_instances, u32 instance_offset,
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const u32 pb_blocks[], u32 blocks_array_size,
|
||
|
|
const struct range *regs_range_array, u32 regs_range_array_size,
|
||
|
|
u64 mask)
|
||
|
|
{
|
||
|
|
int i, j, rc = 0;
|
||
|
|
struct hl_block_glbl_sec *glbl_sec;
|
||
|
|
|
||
|
|
glbl_sec = kcalloc(blocks_array_size,
|
||
|
|
sizeof(struct hl_block_glbl_sec),
|
||
|
|
GFP_KERNEL);
|
||
|
|
if (!glbl_sec)
|
||
|
|
return -ENOMEM;
|
||
|
|
|
||
|
|
hl_secure_block(hdev, glbl_sec, blocks_array_size);
|
||
|
|
rc = hl_unsecure_registers_range(hdev, regs_range_array,
|
||
|
|
regs_range_array_size, 0, pb_blocks, glbl_sec,
|
||
|
|
blocks_array_size);
|
||
|
|
if (rc)
|
||
|
|
goto free_glbl_sec;
|
||
|
|
|
||
|
|
/* Fill all blocks with the same configuration */
|
||
|
|
for (i = 0 ; i < num_dcores ; i++) {
|
||
|
|
for (j = 0 ; j < num_instances ; j++) {
|
||
|
|
int seq = i * num_instances + j;
|
||
|
|
|
||
|
|
if (!(mask & BIT_ULL(seq)))
|
||
|
|
continue;
|
||
|
|
|
||
|
|
hl_config_glbl_sec(hdev, pb_blocks, glbl_sec,
|
||
|
|
i * dcore_offset + j * instance_offset,
|
||
|
|
blocks_array_size);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
free_glbl_sec:
|
||
|
|
kfree(glbl_sec);
|
||
|
|
|
||
|
|
return rc;
|
||
|
|
}
|
||
|
|
|
||
|
|
/**
|
||
|
|
* hl_init_pb_ranges - set pb in HW according to given configuration unsecurring
|
||
|
|
* registers ranges instead of specific registers
|
||
|
|
*
|
||
|
|
* @hdev: pointer to hl_device structure
|
||
|
|
* @num_dcores: number of decores to apply configuration to
|
||
|
|
* set to HL_PB_SHARED if need to apply only once
|
||
|
|
* @dcore_offset: offset between dcores
|
||
|
|
* @num_instances: number of instances to apply configuration to
|
||
|
|
* @instance_offset: offset between instances
|
||
|
|
* @pb_blocks: blocks array
|
||
|
|
* @blocks_array_size: blocks array size
|
||
|
|
* @regs_range_array: register range array
|
||
|
|
* @regs_range_array_size: register range array size
|
||
|
|
*
|
||
|
|
*/
|
||
|
|
int hl_init_pb_ranges(struct hl_device *hdev, u32 num_dcores,
|
||
|
|
u32 dcore_offset, u32 num_instances, u32 instance_offset,
|
||
|
|
const u32 pb_blocks[], u32 blocks_array_size,
|
||
|
|
const struct range *regs_range_array, u32 regs_range_array_size)
|
||
|
|
{
|
||
|
|
return hl_init_pb_ranges_with_mask(hdev, num_dcores, dcore_offset,
|
||
|
|
num_instances, instance_offset, pb_blocks,
|
||
|
|
blocks_array_size, regs_range_array,
|
||
|
|
regs_range_array_size, ULLONG_MAX);
|
||
|
|
}
|
||
|
|
|
||
|
|
/**
|
||
|
|
* hl_init_pb_single_dcore - set pb for a single docre in HW
|
||
|
|
* according to given configuration
|
||
|
|
*
|
||
|
|
* @hdev: pointer to hl_device structure
|
||
|
|
* @dcore_offset: offset from the dcore0
|
||
|
|
* @num_instances: number of instances to apply configuration to
|
||
|
|
* @instance_offset: offset between instances
|
||
|
|
* @pb_blocks: blocks array
|
||
|
|
* @blocks_array_size: blocks array size
|
||
|
|
* @regs_array: register array
|
||
|
|
* @regs_array_size: register array size
|
||
|
|
*
|
||
|
|
*/
|
||
|
|
int hl_init_pb_single_dcore(struct hl_device *hdev, u32 dcore_offset,
|
||
|
|
u32 num_instances, u32 instance_offset,
|
||
|
|
const u32 pb_blocks[], u32 blocks_array_size,
|
||
|
|
const u32 *regs_array, u32 regs_array_size)
|
||
|
|
{
|
||
|
|
int i, rc = 0;
|
||
|
|
struct hl_block_glbl_sec *glbl_sec;
|
||
|
|
|
||
|
|
glbl_sec = kcalloc(blocks_array_size,
|
||
|
|
sizeof(struct hl_block_glbl_sec),
|
||
|
|
GFP_KERNEL);
|
||
|
|
if (!glbl_sec)
|
||
|
|
return -ENOMEM;
|
||
|
|
|
||
|
|
hl_secure_block(hdev, glbl_sec, blocks_array_size);
|
||
|
|
rc = hl_unsecure_registers(hdev, regs_array, regs_array_size, 0,
|
||
|
|
pb_blocks, glbl_sec, blocks_array_size);
|
||
|
|
if (rc)
|
||
|
|
goto free_glbl_sec;
|
||
|
|
|
||
|
|
/* Fill all blocks with the same configuration */
|
||
|
|
for (i = 0 ; i < num_instances ; i++)
|
||
|
|
hl_config_glbl_sec(hdev, pb_blocks, glbl_sec,
|
||
|
|
dcore_offset + i * instance_offset,
|
||
|
|
blocks_array_size);
|
||
|
|
|
||
|
|
free_glbl_sec:
|
||
|
|
kfree(glbl_sec);
|
||
|
|
|
||
|
|
return rc;
|
||
|
|
}
|
||
|
|
|
||
|
|
/**
|
||
|
|
* hl_init_pb_ranges_single_dcore - set pb for a single docre in HW according
|
||
|
|
* to given configuration unsecurring
|
||
|
|
* registers ranges instead of specific
|
||
|
|
* registers
|
||
|
|
*
|
||
|
|
* @hdev: pointer to hl_device structure
|
||
|
|
* @dcore_offset: offset from the dcore0
|
||
|
|
* @num_instances: number of instances to apply configuration to
|
||
|
|
* @instance_offset: offset between instances
|
||
|
|
* @pb_blocks: blocks array
|
||
|
|
* @blocks_array_size: blocks array size
|
||
|
|
* @regs_range_array: register range array
|
||
|
|
* @regs_range_array_size: register range array size
|
||
|
|
*
|
||
|
|
*/
|
||
|
|
int hl_init_pb_ranges_single_dcore(struct hl_device *hdev, u32 dcore_offset,
|
||
|
|
u32 num_instances, u32 instance_offset,
|
||
|
|
const u32 pb_blocks[], u32 blocks_array_size,
|
||
|
|
const struct range *regs_range_array, u32 regs_range_array_size)
|
||
|
|
{
|
||
|
|
int i;
|
||
|
|
struct hl_block_glbl_sec *glbl_sec;
|
||
|
|
|
||
|
|
glbl_sec = kcalloc(blocks_array_size,
|
||
|
|
sizeof(struct hl_block_glbl_sec),
|
||
|
|
GFP_KERNEL);
|
||
|
|
if (!glbl_sec)
|
||
|
|
return -ENOMEM;
|
||
|
|
|
||
|
|
hl_secure_block(hdev, glbl_sec, blocks_array_size);
|
||
|
|
hl_unsecure_registers_range(hdev, regs_range_array,
|
||
|
|
regs_range_array_size, 0, pb_blocks, glbl_sec,
|
||
|
|
blocks_array_size);
|
||
|
|
|
||
|
|
/* Fill all blocks with the same configuration */
|
||
|
|
for (i = 0 ; i < num_instances ; i++)
|
||
|
|
hl_config_glbl_sec(hdev, pb_blocks, glbl_sec,
|
||
|
|
dcore_offset + i * instance_offset,
|
||
|
|
blocks_array_size);
|
||
|
|
|
||
|
|
kfree(glbl_sec);
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
/**
|
||
|
|
* hl_ack_pb_with_mask - ack pb with mask in HW according to given configuration
|
||
|
|
*
|
||
|
|
* @hdev: pointer to hl_device structure
|
||
|
|
* @num_dcores: number of decores to apply configuration to
|
||
|
|
* set to HL_PB_SHARED if need to apply only once
|
||
|
|
* @dcore_offset: offset between dcores
|
||
|
|
* @num_instances: number of instances to apply configuration to
|
||
|
|
* @instance_offset: offset between instances
|
||
|
|
* @pb_blocks: blocks array
|
||
|
|
* @blocks_array_size: blocks array size
|
||
|
|
* @mask: enabled instances mask: 1- enabled, 0- disabled
|
||
|
|
*
|
||
|
|
*/
|
||
|
|
void hl_ack_pb_with_mask(struct hl_device *hdev, u32 num_dcores,
|
||
|
|
u32 dcore_offset, u32 num_instances, u32 instance_offset,
|
||
|
|
const u32 pb_blocks[], u32 blocks_array_size, u64 mask)
|
||
|
|
{
|
||
|
|
int i, j;
|
||
|
|
|
||
|
|
/* ack all blocks */
|
||
|
|
for (i = 0 ; i < num_dcores ; i++) {
|
||
|
|
for (j = 0 ; j < num_instances ; j++) {
|
||
|
|
int seq = i * num_instances + j;
|
||
|
|
|
||
|
|
if (!(mask & BIT_ULL(seq)))
|
||
|
|
continue;
|
||
|
|
|
||
|
|
hl_ack_pb_security_violations(hdev, pb_blocks,
|
||
|
|
i * dcore_offset + j * instance_offset,
|
||
|
|
blocks_array_size);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
/**
|
||
|
|
* hl_ack_pb - ack pb in HW according to given configuration
|
||
|
|
*
|
||
|
|
* @hdev: pointer to hl_device structure
|
||
|
|
* @num_dcores: number of decores to apply configuration to
|
||
|
|
* set to HL_PB_SHARED if need to apply only once
|
||
|
|
* @dcore_offset: offset between dcores
|
||
|
|
* @num_instances: number of instances to apply configuration to
|
||
|
|
* @instance_offset: offset between instances
|
||
|
|
* @pb_blocks: blocks array
|
||
|
|
* @blocks_array_size: blocks array size
|
||
|
|
*
|
||
|
|
*/
|
||
|
|
void hl_ack_pb(struct hl_device *hdev, u32 num_dcores, u32 dcore_offset,
|
||
|
|
u32 num_instances, u32 instance_offset,
|
||
|
|
const u32 pb_blocks[], u32 blocks_array_size)
|
||
|
|
{
|
||
|
|
hl_ack_pb_with_mask(hdev, num_dcores, dcore_offset, num_instances,
|
||
|
|
instance_offset, pb_blocks, blocks_array_size,
|
||
|
|
ULLONG_MAX);
|
||
|
|
}
|
||
|
|
|
||
|
|
/**
|
||
|
|
* hl_ack_pb_single_dcore - ack pb for single docre in HW
|
||
|
|
* according to given configuration
|
||
|
|
*
|
||
|
|
* @hdev: pointer to hl_device structure
|
||
|
|
* @dcore_offset: offset from dcore0
|
||
|
|
* @num_instances: number of instances to apply configuration to
|
||
|
|
* @instance_offset: offset between instances
|
||
|
|
* @pb_blocks: blocks array
|
||
|
|
* @blocks_array_size: blocks array size
|
||
|
|
*
|
||
|
|
*/
|
||
|
|
void hl_ack_pb_single_dcore(struct hl_device *hdev, u32 dcore_offset,
|
||
|
|
u32 num_instances, u32 instance_offset,
|
||
|
|
const u32 pb_blocks[], u32 blocks_array_size)
|
||
|
|
{
|
||
|
|
int i;
|
||
|
|
|
||
|
|
/* ack all blocks */
|
||
|
|
for (i = 0 ; i < num_instances ; i++)
|
||
|
|
hl_ack_pb_security_violations(hdev, pb_blocks,
|
||
|
|
dcore_offset + i * instance_offset,
|
||
|
|
blocks_array_size);
|
||
|
|
|
||
|
|
}
|