390 lines
10 KiB
C
390 lines
10 KiB
C
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2012 ARM Ltd.
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*/
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#ifndef __ASM_FP_H
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#define __ASM_FP_H
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#include <asm/errno.h>
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#include <asm/ptrace.h>
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#include <asm/processor.h>
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#include <asm/sigcontext.h>
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#include <asm/sysreg.h>
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#ifndef __ASSEMBLY__
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#include <linux/bitmap.h>
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#include <linux/build_bug.h>
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#include <linux/bug.h>
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#include <linux/cache.h>
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#include <linux/init.h>
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#include <linux/stddef.h>
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#include <linux/types.h>
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#ifdef CONFIG_COMPAT
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/* Masks for extracting the FPSR and FPCR from the FPSCR */
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#define VFP_FPSCR_STAT_MASK 0xf800009f
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#define VFP_FPSCR_CTRL_MASK 0x07f79f00
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/*
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* The VFP state has 32x64-bit registers and a single 32-bit
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* control/status register.
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*/
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#define VFP_STATE_SIZE ((32 * 8) + 4)
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#endif
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/*
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* When we defined the maximum SVE vector length we defined the ABI so
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* that the maximum vector length included all the reserved for future
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* expansion bits in ZCR rather than those just currently defined by
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* the architecture. While SME follows a similar pattern the fact that
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* it includes a square matrix means that any allocations that attempt
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* to cover the maximum potential vector length (such as happen with
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* the regset used for ptrace) end up being extremely large. Define
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* the much lower actual limit for use in such situations.
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*/
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#define SME_VQ_MAX 16
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struct task_struct;
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extern void fpsimd_save_state(struct user_fpsimd_state *state);
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extern void fpsimd_load_state(struct user_fpsimd_state *state);
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extern void fpsimd_thread_switch(struct task_struct *next);
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extern void fpsimd_flush_thread(void);
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extern void fpsimd_signal_preserve_current_state(void);
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extern void fpsimd_preserve_current_state(void);
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extern void fpsimd_restore_current_state(void);
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extern void fpsimd_update_current_state(struct user_fpsimd_state const *state);
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extern void fpsimd_bind_state_to_cpu(struct user_fpsimd_state *state,
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void *sve_state, unsigned int sve_vl,
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void *za_state, unsigned int sme_vl,
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u64 *svcr);
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extern void fpsimd_flush_task_state(struct task_struct *target);
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extern void fpsimd_save_and_flush_cpu_state(void);
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static inline bool thread_sm_enabled(struct thread_struct *thread)
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{
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return system_supports_sme() && (thread->svcr & SVCR_SM_MASK);
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}
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static inline bool thread_za_enabled(struct thread_struct *thread)
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{
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return system_supports_sme() && (thread->svcr & SVCR_ZA_MASK);
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}
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/* Maximum VL that SVE/SME VL-agnostic software can transparently support */
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#define VL_ARCH_MAX 0x100
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/* Offset of FFR in the SVE register dump */
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static inline size_t sve_ffr_offset(int vl)
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{
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return SVE_SIG_FFR_OFFSET(sve_vq_from_vl(vl)) - SVE_SIG_REGS_OFFSET;
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}
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static inline void *sve_pffr(struct thread_struct *thread)
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{
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unsigned int vl;
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if (system_supports_sme() && thread_sm_enabled(thread))
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vl = thread_get_sme_vl(thread);
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else
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vl = thread_get_sve_vl(thread);
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return (char *)thread->sve_state + sve_ffr_offset(vl);
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}
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extern void sve_save_state(void *state, u32 *pfpsr, int save_ffr);
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extern void sve_load_state(void const *state, u32 const *pfpsr,
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int restore_ffr);
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extern void sve_flush_live(bool flush_ffr, unsigned long vq_minus_1);
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extern unsigned int sve_get_vl(void);
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extern void sve_set_vq(unsigned long vq_minus_1);
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extern void sme_set_vq(unsigned long vq_minus_1);
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extern void za_save_state(void *state);
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extern void za_load_state(void const *state);
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struct arm64_cpu_capabilities;
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extern void sve_kernel_enable(const struct arm64_cpu_capabilities *__unused);
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extern void sme_kernel_enable(const struct arm64_cpu_capabilities *__unused);
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extern void fa64_kernel_enable(const struct arm64_cpu_capabilities *__unused);
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extern u64 read_zcr_features(void);
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extern u64 read_smcr_features(void);
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/*
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* Helpers to translate bit indices in sve_vq_map to VQ values (and
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* vice versa). This allows find_next_bit() to be used to find the
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* _maximum_ VQ not exceeding a certain value.
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*/
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static inline unsigned int __vq_to_bit(unsigned int vq)
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{
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return SVE_VQ_MAX - vq;
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}
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static inline unsigned int __bit_to_vq(unsigned int bit)
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{
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return SVE_VQ_MAX - bit;
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}
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struct vl_info {
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enum vec_type type;
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const char *name; /* For display purposes */
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/* Minimum supported vector length across all CPUs */
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int min_vl;
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/* Maximum supported vector length across all CPUs */
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int max_vl;
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int max_virtualisable_vl;
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/*
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* Set of available vector lengths,
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* where length vq encoded as bit __vq_to_bit(vq):
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*/
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DECLARE_BITMAP(vq_map, SVE_VQ_MAX);
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/* Set of vector lengths present on at least one cpu: */
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DECLARE_BITMAP(vq_partial_map, SVE_VQ_MAX);
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};
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#ifdef CONFIG_ARM64_SVE
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extern void sve_alloc(struct task_struct *task, bool flush);
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extern void fpsimd_release_task(struct task_struct *task);
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extern void fpsimd_sync_to_sve(struct task_struct *task);
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extern void fpsimd_force_sync_to_sve(struct task_struct *task);
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extern void sve_sync_to_fpsimd(struct task_struct *task);
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extern void sve_sync_from_fpsimd_zeropad(struct task_struct *task);
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extern int vec_set_vector_length(struct task_struct *task, enum vec_type type,
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unsigned long vl, unsigned long flags);
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extern int sve_set_current_vl(unsigned long arg);
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extern int sve_get_current_vl(void);
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static inline void sve_user_disable(void)
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{
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sysreg_clear_set(cpacr_el1, CPACR_EL1_ZEN_EL0EN, 0);
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}
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static inline void sve_user_enable(void)
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{
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sysreg_clear_set(cpacr_el1, 0, CPACR_EL1_ZEN_EL0EN);
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}
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#define sve_cond_update_zcr_vq(val, reg) \
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do { \
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u64 __zcr = read_sysreg_s((reg)); \
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u64 __new = __zcr & ~ZCR_ELx_LEN_MASK; \
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__new |= (val) & ZCR_ELx_LEN_MASK; \
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if (__zcr != __new) \
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write_sysreg_s(__new, (reg)); \
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} while (0)
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/*
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* Probing and setup functions.
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* Calls to these functions must be serialised with one another.
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*/
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enum vec_type;
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extern void __init vec_init_vq_map(enum vec_type type);
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extern void vec_update_vq_map(enum vec_type type);
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extern int vec_verify_vq_map(enum vec_type type);
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extern void __init sve_setup(void);
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extern __ro_after_init struct vl_info vl_info[ARM64_VEC_MAX];
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static inline void write_vl(enum vec_type type, u64 val)
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{
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u64 tmp;
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switch (type) {
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#ifdef CONFIG_ARM64_SVE
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case ARM64_VEC_SVE:
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tmp = read_sysreg_s(SYS_ZCR_EL1) & ~ZCR_ELx_LEN_MASK;
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write_sysreg_s(tmp | val, SYS_ZCR_EL1);
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break;
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#endif
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#ifdef CONFIG_ARM64_SME
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case ARM64_VEC_SME:
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tmp = read_sysreg_s(SYS_SMCR_EL1) & ~SMCR_ELx_LEN_MASK;
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write_sysreg_s(tmp | val, SYS_SMCR_EL1);
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break;
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#endif
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default:
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WARN_ON_ONCE(1);
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break;
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}
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}
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static inline int vec_max_vl(enum vec_type type)
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{
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return vl_info[type].max_vl;
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}
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static inline int vec_max_virtualisable_vl(enum vec_type type)
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{
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return vl_info[type].max_virtualisable_vl;
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}
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static inline int sve_max_vl(void)
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{
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return vec_max_vl(ARM64_VEC_SVE);
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}
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static inline int sve_max_virtualisable_vl(void)
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{
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return vec_max_virtualisable_vl(ARM64_VEC_SVE);
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}
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/* Ensure vq >= SVE_VQ_MIN && vq <= SVE_VQ_MAX before calling this function */
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static inline bool vq_available(enum vec_type type, unsigned int vq)
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{
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return test_bit(__vq_to_bit(vq), vl_info[type].vq_map);
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}
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static inline bool sve_vq_available(unsigned int vq)
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{
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return vq_available(ARM64_VEC_SVE, vq);
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}
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size_t sve_state_size(struct task_struct const *task);
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#else /* ! CONFIG_ARM64_SVE */
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static inline void sve_alloc(struct task_struct *task, bool flush) { }
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static inline void fpsimd_release_task(struct task_struct *task) { }
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static inline void sve_sync_to_fpsimd(struct task_struct *task) { }
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static inline void sve_sync_from_fpsimd_zeropad(struct task_struct *task) { }
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static inline int sve_max_virtualisable_vl(void)
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{
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return 0;
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}
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static inline int sve_set_current_vl(unsigned long arg)
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{
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return -EINVAL;
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}
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static inline int sve_get_current_vl(void)
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{
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return -EINVAL;
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}
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static inline int sve_max_vl(void)
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{
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return -EINVAL;
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}
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static inline bool sve_vq_available(unsigned int vq) { return false; }
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static inline void sve_user_disable(void) { BUILD_BUG(); }
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static inline void sve_user_enable(void) { BUILD_BUG(); }
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#define sve_cond_update_zcr_vq(val, reg) do { } while (0)
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static inline void vec_init_vq_map(enum vec_type t) { }
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static inline void vec_update_vq_map(enum vec_type t) { }
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static inline int vec_verify_vq_map(enum vec_type t) { return 0; }
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static inline void sve_setup(void) { }
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static inline size_t sve_state_size(struct task_struct const *task)
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{
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return 0;
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}
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#endif /* ! CONFIG_ARM64_SVE */
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#ifdef CONFIG_ARM64_SME
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static inline void sme_user_disable(void)
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{
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sysreg_clear_set(cpacr_el1, CPACR_EL1_SMEN_EL0EN, 0);
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}
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static inline void sme_user_enable(void)
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{
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sysreg_clear_set(cpacr_el1, 0, CPACR_EL1_SMEN_EL0EN);
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}
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static inline void sme_smstart_sm(void)
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{
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asm volatile(__msr_s(SYS_SVCR_SMSTART_SM_EL0, "xzr"));
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}
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static inline void sme_smstop_sm(void)
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{
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asm volatile(__msr_s(SYS_SVCR_SMSTOP_SM_EL0, "xzr"));
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}
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static inline void sme_smstop(void)
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{
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asm volatile(__msr_s(SYS_SVCR_SMSTOP_SMZA_EL0, "xzr"));
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}
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extern void __init sme_setup(void);
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static inline int sme_max_vl(void)
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{
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return vec_max_vl(ARM64_VEC_SME);
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}
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static inline int sme_max_virtualisable_vl(void)
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{
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return vec_max_virtualisable_vl(ARM64_VEC_SME);
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}
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extern void sme_alloc(struct task_struct *task, bool flush);
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extern unsigned int sme_get_vl(void);
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extern int sme_set_current_vl(unsigned long arg);
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extern int sme_get_current_vl(void);
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/*
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* Return how many bytes of memory are required to store the full SME
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* specific state (currently just ZA) for task, given task's currently
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* configured vector length.
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*/
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static inline size_t za_state_size(struct task_struct const *task)
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{
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unsigned int vl = task_get_sme_vl(task);
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return ZA_SIG_REGS_SIZE(sve_vq_from_vl(vl));
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}
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#else
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static inline void sme_user_disable(void) { BUILD_BUG(); }
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static inline void sme_user_enable(void) { BUILD_BUG(); }
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|
static inline void sme_smstart_sm(void) { }
|
||
|
|
static inline void sme_smstop_sm(void) { }
|
||
|
|
static inline void sme_smstop(void) { }
|
||
|
|
|
||
|
|
static inline void sme_alloc(struct task_struct *task, bool flush) { }
|
||
|
|
static inline void sme_setup(void) { }
|
||
|
|
static inline unsigned int sme_get_vl(void) { return 0; }
|
||
|
|
static inline int sme_max_vl(void) { return 0; }
|
||
|
|
static inline int sme_max_virtualisable_vl(void) { return 0; }
|
||
|
|
static inline int sme_set_current_vl(unsigned long arg) { return -EINVAL; }
|
||
|
|
static inline int sme_get_current_vl(void) { return -EINVAL; }
|
||
|
|
|
||
|
|
static inline size_t za_state_size(struct task_struct const *task)
|
||
|
|
{
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
#endif /* ! CONFIG_ARM64_SME */
|
||
|
|
|
||
|
|
/* For use by EFI runtime services calls only */
|
||
|
|
extern void __efi_fpsimd_begin(void);
|
||
|
|
extern void __efi_fpsimd_end(void);
|
||
|
|
|
||
|
|
#endif
|
||
|
|
|
||
|
|
#endif
|