305 lines
6.7 KiB
Plaintext
305 lines
6.7 KiB
Plaintext
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright 2020 Protonic Holland
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* Copyright 2019 NXP
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*/
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/dts-v1/;
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#include <dt-bindings/usb/pd.h>
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#include "imx8mm.dtsi"
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/ {
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model = "Protonic PRT8MM";
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compatible = "prt,prt8mm", "fsl,imx8mm";
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chosen {
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stdout-path = &uart4;
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};
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memory@40000000 {
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device_type = "memory";
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reg = <0x0 0x40000000 0 0x40000000>;
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpio_leds>;
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debug-led0 {
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label = "DEBUG_LED0";
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gpios = <&gpio3 0 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "heartbeat";
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};
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debug-led1 {
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label = "DEBUG_LED1";
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gpios = <&gpio3 1 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "cpu";
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};
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};
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sound-ssm2518 {
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compatible = "simple-audio-card";
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simple-audio-card,name = "ssm2518-audio";
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simple-audio-card,format = "i2s";
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simple-audio-card,frame-master = <&cpudai>;
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simple-audio-card,bitclock-master = <&cpudai>;
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cpudai: simple-audio-card,cpu {
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sound-dai = <&sai3>;
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};
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simple-audio-card,codec {
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sound-dai = <&ssm2518>;
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clocks = <&clk IMX8MM_CLK_SAI3_ROOT>;
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};
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};
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};
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&i2c1 {
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c1>;
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status = "okay";
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ssm2518: audio-codec@34 {
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compatible = "adi,ssm2518";
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reg = <0x34>;
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#sound-dai-cells = <0>;
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};
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};
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&i2c2 {
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c2>;
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status = "okay";
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regulator@60 {
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compatible = "fcs,fan53555";
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reg = <0x60>;
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regulator-name = "0V9_CORE";
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regulator-min-microvolt = <900000>;
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regulator-max-microvolt = <980000>;
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regulator-boot-on;
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regulator-always-on;
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};
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};
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&i2c3 {
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c3>;
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status = "okay";
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rtc@51 {
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compatible = "nxp,pcf85363";
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reg = <0x51>;
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};
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touchscreeen@5d {
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compatible = "goodix,gt911";
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reg = <0x5d>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_touchscreen>;
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interrupt-parent = <&gpio1>;
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interrupts = <8 IRQ_TYPE_NONE>;
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irq-gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
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reset-gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
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};
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temp-sense@70 {
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compatible = "ti,tmp103";
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reg = <0x70>;
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};
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};
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&sai3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_sai3>;
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assigned-clocks = <&clk IMX8MM_CLK_SAI3>;
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assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
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assigned-clock-rates = <12288000>;
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fsl,sai-mclk-direction-output;
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fsl,sai-asynchronous;
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status = "okay";
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};
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&snvs_pwrkey {
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status = "okay";
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};
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&uart4 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart4>;
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status = "okay";
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};
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&usbotg1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usbotg1>;
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dr_mode = "host";
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disable-over-current;
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power-active-high;
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status = "okay";
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};
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&usdhc2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc2>;
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assigned-clocks = <&clk IMX8MM_CLK_USDHC2>;
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assigned-clock-rates = <100000000>;
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cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
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bus-width = <4>;
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status = "okay";
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};
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&usdhc3 {
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pinctrl-names = "default", "state_100mhz", "state_200mhz";
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pinctrl-0 = <&pinctrl_usdhc3>;
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pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
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pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
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assigned-clocks = <&clk IMX8MM_CLK_USDHC3_ROOT>;
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assigned-clock-rates = <400000000>;
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bus-width = <8>;
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non-removable;
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no-sdio;
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no-sd;
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status = "okay";
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};
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&wdog1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_wdog>;
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fsl,ext-reset-output;
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status = "okay";
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};
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&iomuxc {
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pinctrl_gpio_leds: ledsgrp {
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fsl,pins = <
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MX8MM_IOMUXC_NAND_ALE_GPIO3_IO0 0x00
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MX8MM_IOMUXC_NAND_CE0_B_GPIO3_IO1 0x00
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>;
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};
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pinctrl_i2c1: i2c1grp {
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fsl,pins = <
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MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400000c3
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MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400000c3
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>;
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};
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pinctrl_i2c2: i2c2grp {
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fsl,pins = <
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MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400000c3
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MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400000c3
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>;
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};
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pinctrl_i2c3: i2c3grp {
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fsl,pins = <
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MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400000c3
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MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400000c3
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>;
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};
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pinctrl_sai3: sai3grp {
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fsl,pins = <
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MX8MM_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6
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MX8MM_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0xd6
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MX8MM_IOMUXC_SAI3_MCLK_SAI3_MCLK 0xd6
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MX8MM_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0xd6
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>;
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};
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pinctrl_touchscreen: tsgrp {
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fsl,pins = <
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MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x80
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MX8MM_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x80
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>;
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};
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pinctrl_uart4: uart4grp {
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fsl,pins = <
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MX8MM_IOMUXC_UART4_RXD_UART4_DCE_RX 0x040
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MX8MM_IOMUXC_UART4_TXD_UART4_DCE_TX 0x040
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>;
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};
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pinctrl_usbotg1: usbotg1grp {
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fsl,pins = <
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MX8MM_IOMUXC_GPIO1_IO12_USB1_OTG_PWR 0x000
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MX8MM_IOMUXC_GPIO1_IO13_USB1_OTG_OC 0x000
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>;
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};
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pinctrl_usdhc2: usdhc2grp {
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fsl,pins = <
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MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190
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MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0
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MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0
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MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0
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MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0
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MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0
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MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x0d4
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>;
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};
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pinctrl_usdhc3: usdhc3grp {
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fsl,pins = <
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MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x190
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MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0
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MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0
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MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0
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MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0
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MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0
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MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0
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MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d0
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MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d0
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MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0
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MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190
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>;
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};
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pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
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fsl,pins = <
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MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x194
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MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4
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MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4
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MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4
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MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4
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MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4
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MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4
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MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d4
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MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d4
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MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4
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MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194
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>;
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};
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pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
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fsl,pins = <
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MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x196
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MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6
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MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d6
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MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d6
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MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d6
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MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d6
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MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d6
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MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d6
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MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d6
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MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d6
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MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x196
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>;
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};
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pinctrl_wdog: wdoggrp {
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fsl,pins = <
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MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6
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>;
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};
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};
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