75 lines
1.7 KiB
Plaintext
75 lines
1.7 KiB
Plaintext
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2019~2020, 2022 NXP
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*/
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&lsio_gpio0 {
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compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio";
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interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
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};
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&lsio_gpio1 {
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compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio";
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interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
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};
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&lsio_gpio2 {
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compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio";
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interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
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};
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&lsio_gpio3 {
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compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio";
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interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
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};
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&lsio_gpio4 {
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compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio";
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interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
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};
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&lsio_gpio5 {
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compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio";
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interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
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};
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&lsio_gpio6 {
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compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio";
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interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
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};
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&lsio_gpio7 {
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compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio";
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interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
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};
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&lsio_mu0 {
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compatible = "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
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interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
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};
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&lsio_mu1 {
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compatible = "fsl,imx8-mu-scu", "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
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interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
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};
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&lsio_mu2 {
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compatible = "fsl,imx8-mu-scu", "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
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interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
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};
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&lsio_mu3 {
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compatible = "fsl,imx8-mu-scu", "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
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interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
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};
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&lsio_mu4 {
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compatible = "fsl,imx8-mu-scu", "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
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interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
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};
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&lsio_mu5 {
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compatible = "fsl,imx8qxp-mu", "fsl,imx6sx-mu";
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interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
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};
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