393 lines
6.1 KiB
Plaintext
393 lines
6.1 KiB
Plaintext
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Device Tree file for NXP LS1028A QDS Board.
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*
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* Copyright 2018 NXP
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*
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* Harninder Rai <harninder.rai@nxp.com>
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*
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*/
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/dts-v1/;
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#include "fsl-ls1028a.dtsi"
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/ {
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model = "LS1028A QDS Board";
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compatible = "fsl,ls1028a-qds", "fsl,ls1028a";
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aliases {
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crypto = &crypto;
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gpio0 = &gpio1;
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gpio1 = &gpio2;
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gpio2 = &gpio3;
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serial0 = &duart0;
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serial1 = &duart1;
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mmc0 = &esdhc;
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mmc1 = &esdhc1;
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rtc1 = &ftm_alarm1;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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memory@80000000 {
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device_type = "memory";
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reg = <0x0 0x80000000 0x1 0x00000000>;
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};
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sys_mclk: clock-mclk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <25000000>;
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};
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reg_1p8v: regulator-1p8v {
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compatible = "regulator-fixed";
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regulator-name = "1P8V";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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sb_3v3: regulator-sb3v3 {
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compatible = "regulator-fixed";
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regulator-name = "3v3_vbus";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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sound {
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compatible = "simple-audio-card";
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simple-audio-card,format = "i2s";
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simple-audio-card,widgets =
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"Microphone", "Microphone Jack",
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"Headphone", "Headphone Jack",
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"Speaker", "Speaker Ext",
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"Line", "Line In Jack";
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simple-audio-card,routing =
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"MIC_IN", "Microphone Jack",
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"Microphone Jack", "Mic Bias",
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"LINE_IN", "Line In Jack",
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"Headphone Jack", "HP_OUT",
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"Speaker Ext", "LINE_OUT";
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simple-audio-card,cpu {
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sound-dai = <&sai1>;
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frame-master;
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bitclock-master;
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};
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simple-audio-card,codec {
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sound-dai = <&sgtl5000>;
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frame-master;
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bitclock-master;
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system-clock-frequency = <25000000>;
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};
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};
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mdio-mux {
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compatible = "mdio-mux-multiplexer";
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mux-controls = <&mux 0>;
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mdio-parent-bus = <&enetc_mdio_pf3>;
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#address-cells = <1>;
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#size-cells = <0>;
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/* on-board RGMII PHY */
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mdio@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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qds_phy1: ethernet-phy@5 {
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/* Atheros 8035 */
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reg = <5>;
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};
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};
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mdio_slot1: mdio@4 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <4>;
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};
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mdio_slot2: mdio@5 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <5>;
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};
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mdio_slot3: mdio@6 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <6>;
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};
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mdio_slot4: mdio@7 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <7>;
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};
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};
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};
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&can0 {
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status = "okay";
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};
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&can1 {
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status = "okay";
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};
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&dspi0 {
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bus-num = <0>;
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status = "okay";
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flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "jedec,spi-nor";
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spi-cpol;
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spi-cpha;
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reg = <0>;
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spi-max-frequency = <10000000>;
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};
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flash@1 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "jedec,spi-nor";
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spi-cpol;
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spi-cpha;
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reg = <1>;
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spi-max-frequency = <10000000>;
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};
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flash@2 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "jedec,spi-nor";
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spi-cpol;
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spi-cpha;
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reg = <2>;
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spi-max-frequency = <10000000>;
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};
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};
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&dspi1 {
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bus-num = <1>;
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status = "okay";
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flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "jedec,spi-nor";
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spi-cpol;
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spi-cpha;
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reg = <0>;
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spi-max-frequency = <10000000>;
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};
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flash@1 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "jedec,spi-nor";
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spi-cpol;
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spi-cpha;
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reg = <1>;
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spi-max-frequency = <10000000>;
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};
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flash@2 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "jedec,spi-nor";
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spi-cpol;
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spi-cpha;
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reg = <2>;
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spi-max-frequency = <10000000>;
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};
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};
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&dspi2 {
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bus-num = <2>;
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status = "okay";
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flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "jedec,spi-nor";
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spi-cpol;
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spi-cpha;
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reg = <0>;
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spi-max-frequency = <10000000>;
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};
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};
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&duart0 {
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status = "okay";
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};
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&duart1 {
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status = "okay";
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};
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&enetc_port1 {
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phy-handle = <&qds_phy1>;
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phy-mode = "rgmii-id";
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status = "okay";
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};
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&enetc_port2 {
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status = "okay";
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};
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&esdhc {
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status = "okay";
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};
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&esdhc1 {
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status = "okay";
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};
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&fspi {
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status = "okay";
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mt35xu02g0: flash@0 {
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compatible = "jedec,spi-nor";
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#address-cells = <1>;
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#size-cells = <1>;
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spi-max-frequency = <50000000>;
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/* The following setting enables 1-1-8 (CMD-ADDR-DATA) mode */
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spi-rx-bus-width = <8>; /* 8 SPI Rx lines */
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spi-tx-bus-width = <1>; /* 1 SPI Tx line */
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reg = <0>;
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};
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};
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&ftm_alarm1 {
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status = "okay";
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};
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&i2c0 {
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status = "okay";
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i2c-mux@77 {
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compatible = "nxp,pca9547";
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reg = <0x77>;
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#address-cells = <1>;
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#size-cells = <0>;
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i2c@2 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x2>;
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current-monitor@40 {
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compatible = "ti,ina220";
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reg = <0x40>;
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shunt-resistor = <1000>;
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};
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current-monitor@41 {
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compatible = "ti,ina220";
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reg = <0x41>;
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shunt-resistor = <1000>;
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};
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};
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i2c@3 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x3>;
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temperature-sensor@4c {
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compatible = "nxp,sa56004";
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reg = <0x4c>;
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vcc-supply = <&sb_3v3>;
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};
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eeprom@56 {
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compatible = "atmel,24c512";
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reg = <0x56>;
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};
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eeprom@57 {
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compatible = "atmel,24c512";
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reg = <0x57>;
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};
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};
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i2c@5 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x5>;
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sgtl5000: audio-codec@a {
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#sound-dai-cells = <0>;
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compatible = "fsl,sgtl5000";
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reg = <0xa>;
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VDDA-supply = <®_1p8v>;
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VDDIO-supply = <®_1p8v>;
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clocks = <&sys_mclk>;
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};
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};
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};
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fpga@66 {
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compatible = "fsl,ls1028aqds-fpga", "fsl,fpga-qixis-i2c",
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"simple-mfd";
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reg = <0x66>;
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mux: mux-controller {
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compatible = "reg-mux";
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#mux-control-cells = <1>;
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mux-reg-masks = <0x54 0xf0>; /* 0: reg 0x54, bits 7:4 */
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};
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};
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};
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&i2c1 {
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status = "okay";
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rtc@51 {
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compatible = "nxp,pcf2129";
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reg = <0x51>;
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};
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};
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&lpuart0 {
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status = "okay";
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};
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&lpuart1 {
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status = "okay";
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};
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&mscc_felix_port4 {
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ethernet = <&enetc_port2>;
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status = "okay";
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};
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&sai1 {
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status = "okay";
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};
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&sata {
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status = "okay";
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};
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&usb0 {
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dr_mode = "host";
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status = "okay";
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};
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&usb1 {
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dr_mode = "host";
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status = "okay";
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};
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