651 lines
14 KiB
Plaintext
651 lines
14 KiB
Plaintext
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// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright 2013 Linaro Ltd.
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*/
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#include "ste-nomadik-pinctrl.dtsi"
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&pinctrl {
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/* Settings for all UART default and sleep states */
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uart0 {
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u0_a_1_default: u0_a_1_default {
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default_mux {
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function = "u0";
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groups = "u0_a_1";
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};
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default_cfg1 {
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pins = "GPIO0_AJ5", "GPIO2_AH4"; /* CTS+RXD */
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ste,config = <&in_pu>;
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};
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default_cfg2 {
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pins = "GPIO1_AJ3", "GPIO3_AH3"; /* RTS+TXD */
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ste,config = <&out_hi>;
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};
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};
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u0_a_1_sleep: u0_a_1_sleep {
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sleep_cfg1 {
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pins = "GPIO0_AJ5", "GPIO2_AH4"; /* CTS+RXD */
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ste,config = <&slpm_in_wkup_pdis>;
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};
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sleep_cfg2 {
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pins = "GPIO1_AJ3"; /* RTS */
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ste,config = <&slpm_out_hi_wkup_pdis>;
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};
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sleep_cfg3 {
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pins = "GPIO3_AH3"; /* TXD */
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ste,config = <&slpm_out_wkup_pdis>;
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};
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};
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};
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uart1 {
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u1rxtx_a_1_default: u1rxtx_a_1_default {
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default_mux {
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function = "u1";
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groups = "u1rxtx_a_1";
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};
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default_cfg1 {
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pins = "GPIO4_AH6"; /* RXD */
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ste,config = <&in_pu>;
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};
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default_cfg2 {
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pins = "GPIO5_AG6"; /* TXD */
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ste,config = <&out_hi>;
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};
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};
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u1rxtx_a_1_sleep: u1rxtx_a_1_sleep {
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sleep_cfg1 {
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pins = "GPIO4_AH6"; /* RXD */
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ste,config = <&slpm_in_wkup_pdis>;
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};
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sleep_cfg2 {
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pins = "GPIO5_AG6"; /* TXD */
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ste,config = <&slpm_out_wkup_pdis>;
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};
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};
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u1ctsrts_a_1_default: u1ctsrts_a_1_default {
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default_mux {
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function = "u1";
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groups = "u1ctsrts_a_1";
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};
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default_cfg1 {
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pins = "GPIO6_AF6"; /* CTS */
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ste,config = <&in_pu>;
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};
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default_cfg2 {
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pins = "GPIO7_AG5"; /* RTS */
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ste,config = <&out_hi>;
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};
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};
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u1ctsrts_a_1_sleep: u1ctsrts_a_1_sleep {
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sleep_cfg1 {
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pins = "GPIO6_AF6"; /* CTS */
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ste,config = <&slpm_in_wkup_pdis>;
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};
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sleep_cfg2 {
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pins = "GPIO7_AG5"; /* RTS */
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ste,config = <&slpm_out_hi_wkup_pdis>;
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};
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};
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};
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uart2 {
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u2rxtx_c_1_default: u2rxtx_c_1_default {
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default_mux {
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function = "u2";
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groups = "u2rxtx_c_1";
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};
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default_cfg1 {
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pins = "GPIO29_W2"; /* RXD */
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ste,config = <&in_pu>;
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};
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default_cfg2 {
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pins = "GPIO30_W3"; /* TXD */
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ste,config = <&out_hi>;
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};
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};
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u2rxtx_c_1_sleep: u2rxtx_c_1_sleep {
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sleep_cfg1 {
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pins = "GPIO29_W2"; /* RXD */
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ste,config = <&in_wkup_pdis>;
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};
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sleep_cfg2 {
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pins = "GPIO30_W3"; /* TXD */
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ste,config = <&out_wkup_pdis>;
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};
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};
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};
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/* Settings for all I2C default and sleep states */
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i2c0 {
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i2c0_a_1_default: i2c0_a_1_default {
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default_mux {
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function = "i2c0";
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groups = "i2c0_a_1";
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};
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default_cfg1 {
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pins = "GPIO147_C15", "GPIO148_B16"; /* SDA/SCL */
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ste,config = <&in_nopull>;
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};
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};
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i2c0_a_1_sleep: i2c0_a_1_sleep {
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sleep_cfg1 {
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pins = "GPIO147_C15", "GPIO148_B16"; /* SDA/SCL */
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ste,config = <&slpm_in_wkup_pdis>;
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};
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};
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};
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i2c1 {
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i2c1_b_2_default: i2c1_b_2_default {
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default_mux {
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function = "i2c1";
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groups = "i2c1_b_2";
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};
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default_cfg1 {
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pins = "GPIO16_AD3", "GPIO17_AD4"; /* SDA/SCL */
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ste,config = <&in_nopull>;
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};
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};
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i2c1_b_2_sleep: i2c1_b_2_sleep {
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sleep_cfg1 {
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pins = "GPIO16_AD3", "GPIO17_AD4"; /* SDA/SCL */
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ste,config = <&slpm_in_wkup_pdis>;
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};
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};
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};
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i2c2 {
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i2c2_b_1_default: i2c2_b_1_default {
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default_mux {
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function = "i2c2";
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groups = "i2c2_b_1";
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};
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default_cfg1 {
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pins = "GPIO8_AD5", "GPIO9_AE4"; /* SDA/SCL */
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ste,config = <&in_nopull>;
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};
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};
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i2c2_b_1_sleep: i2c2_b_1_sleep {
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sleep_cfg1 {
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pins = "GPIO8_AD5", "GPIO9_AE4"; /* SDA/SCL */
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ste,config = <&slpm_in_wkup_pdis>;
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};
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};
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i2c2_b_2_default: i2c2_b_2_default {
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default_mux {
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function = "i2c2";
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groups = "i2c2_b_2";
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};
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default_cfg1 {
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pins = "GPIO10_AF5", "GPIO11_AG4"; /* SDA/SCL */
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ste,config = <&in_nopull>;
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};
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};
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i2c2_b_2_sleep: i2c2_b_2_sleep {
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sleep_cfg1 {
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pins = "GPIO10_AF5", "GPIO11_AG4"; /* SDA/SCL */
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ste,config = <&slpm_in_wkup_pdis>;
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};
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};
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};
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i2c3 {
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i2c3_c_2_default: i2c3_c_2_default {
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default_mux {
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function = "i2c3";
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groups = "i2c3_c_2";
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};
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default_cfg1 {
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pins = "GPIO229_AG7", "GPIO230_AF7"; /* SDA/SCL */
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ste,config = <&in_nopull>;
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};
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};
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i2c3_c_2_sleep: i2c3_c_2_sleep {
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sleep_cfg1 {
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pins = "GPIO229_AG7", "GPIO230_AF7"; /* SDA/SCL */
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ste,config = <&slpm_in_wkup_pdis>;
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};
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};
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};
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/*
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* Activating I2C4 will conflict with UART1 about the same pins so do not
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* enable I2C4 and UART1 at the same time.
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*/
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i2c4 {
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i2c4_b_1_default: i2c4_b_1_default {
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default_mux {
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function = "i2c4";
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groups = "i2c4_b_1";
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};
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default_cfg1 {
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pins = "GPIO4_AH6", "GPIO5_AG6"; /* SDA/SCL */
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ste,config = <&in_nopull>;
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};
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};
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i2c4_b_1_sleep: i2c4_b_1_sleep {
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sleep_cfg1 {
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pins = "GPIO4_AH6", "GPIO5_AG6"; /* SDA/SCL */
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ste,config = <&slpm_in_wkup_pdis>;
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};
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};
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};
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/* Settings for all MMC/SD/SDIO default and sleep states */
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sdi0 {
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/* This is the external SD card slot, 4 bits wide */
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mc0_a_1_default: mc0_a_1_default {
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default_mux {
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function = "mc0";
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groups = "mc0_a_1";
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};
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default_cfg1 {
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pins =
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"GPIO18_AC2", /* CMDDIR */
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"GPIO19_AC1", /* DAT0DIR */
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"GPIO20_AB4"; /* DAT2DIR */
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ste,config = <&out_hi>;
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};
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default_cfg2 {
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pins = "GPIO22_AA3"; /* FBCLK */
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ste,config = <&in_nopull>;
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};
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default_cfg3 {
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pins = "GPIO23_AA4"; /* CLK */
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ste,config = <&out_lo>;
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};
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default_cfg4 {
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pins =
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"GPIO24_AB2", /* CMD */
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"GPIO25_Y4", /* DAT0 */
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"GPIO26_Y2", /* DAT1 */
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"GPIO27_AA2", /* DAT2 */
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"GPIO28_AA1"; /* DAT3 */
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ste,config = <&in_pu>;
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};
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};
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mc0_a_1_sleep: mc0_a_1_sleep {
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sleep_cfg1 {
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pins =
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"GPIO18_AC2", /* CMDDIR */
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"GPIO19_AC1", /* DAT0DIR */
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"GPIO20_AB4"; /* DAT2DIR */
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ste,config = <&slpm_out_hi_wkup_pdis>;
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};
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sleep_cfg2 {
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pins =
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"GPIO22_AA3", /* FBCLK */
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"GPIO24_AB2", /* CMD */
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"GPIO25_Y4", /* DAT0 */
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"GPIO26_Y2", /* DAT1 */
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"GPIO27_AA2", /* DAT2 */
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"GPIO28_AA1"; /* DAT3 */
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ste,config = <&slpm_in_wkup_pdis>;
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};
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sleep_cfg3 {
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pins = "GPIO23_AA4"; /* CLK */
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ste,config = <&slpm_out_lo_wkup_pdis>;
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};
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};
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mc0_a_2_default: mc0_a_2_default {
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default_mux {
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function = "mc0";
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groups = "mc0_a_2";
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};
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default_cfg1 {
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pins = "GPIO22_AA3"; /* FBCLK */
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ste,config = <&in_nopull>;
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};
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default_cfg2 {
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pins = "GPIO23_AA4"; /* CLK */
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ste,config = <&out_lo>;
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};
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default_cfg3 {
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pins =
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"GPIO24_AB2", /* CMD */
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"GPIO25_Y4", /* DAT0 */
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"GPIO26_Y2", /* DAT1 */
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"GPIO27_AA2", /* DAT2 */
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"GPIO28_AA1"; /* DAT3 */
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ste,config = <&in_pu>;
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};
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};
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mc0_a_2_sleep: mc0_a_2_sleep {
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sleep_cfg1 {
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pins =
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"GPIO22_AA3", /* FBCLK */
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"GPIO24_AB2", /* CMD */
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"GPIO25_Y4", /* DAT0 */
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"GPIO26_Y2", /* DAT1 */
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"GPIO27_AA2", /* DAT2 */
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"GPIO28_AA1"; /* DAT3 */
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ste,config = <&slpm_in_wkup_pdis>;
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};
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sleep_cfg2 {
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pins = "GPIO23_AA4"; /* CLK */
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ste,config = <&slpm_out_lo_wkup_pdis>;
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};
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};
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};
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sdi1 {
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/* This is the WLAN SDIO 4 bits wide */
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mc1_a_1_default: mc1_a_1_default {
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default_mux {
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function = "mc1";
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groups = "mc1_a_1";
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};
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default_cfg1 {
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pins = "GPIO208_AH16"; /* CLK */
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ste,config = <&out_lo>;
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};
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default_cfg2 {
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pins = "GPIO209_AG15"; /* FBCLK */
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ste,config = <&in_nopull>;
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};
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default_cfg3 {
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pins =
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"GPIO210_AJ15", /* CMD */
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"GPIO211_AG14", /* DAT0 */
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"GPIO212_AF13", /* DAT1 */
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"GPIO213_AG13", /* DAT2 */
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"GPIO214_AH15"; /* DAT3 */
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ste,config = <&in_pu>;
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};
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};
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mc1_a_1_sleep: mc1_a_1_sleep {
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sleep_cfg1 {
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|
|
pins = "GPIO208_AH16"; /* CLK */
|
||
|
|
ste,config = <&slpm_out_lo_wkup_pdis>;
|
||
|
|
};
|
||
|
|
sleep_cfg2 {
|
||
|
|
pins =
|
||
|
|
"GPIO209_AG15", /* FBCLK */
|
||
|
|
"GPIO210_AJ15", /* CMD */
|
||
|
|
"GPIO211_AG14", /* DAT0 */
|
||
|
|
"GPIO212_AF13", /* DAT1 */
|
||
|
|
"GPIO213_AG13", /* DAT2 */
|
||
|
|
"GPIO214_AH15"; /* DAT3 */
|
||
|
|
ste,config = <&slpm_in_wkup_pdis>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
mc1_a_2_default: mc1_a_2_default {
|
||
|
|
default_mux {
|
||
|
|
function = "mc1";
|
||
|
|
groups = "mc1_a_2";
|
||
|
|
};
|
||
|
|
default_cfg1 {
|
||
|
|
pins = "GPIO208_AH16"; /* CLK */
|
||
|
|
ste,config = <&out_lo>;
|
||
|
|
};
|
||
|
|
default_cfg2 {
|
||
|
|
pins =
|
||
|
|
"GPIO210_AJ15", /* CMD */
|
||
|
|
"GPIO211_AG14", /* DAT0 */
|
||
|
|
"GPIO212_AF13", /* DAT1 */
|
||
|
|
"GPIO213_AG13", /* DAT2 */
|
||
|
|
"GPIO214_AH15"; /* DAT3 */
|
||
|
|
ste,config = <&in_pu>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
mc1_a_2_sleep: mc1_a_2_sleep {
|
||
|
|
sleep_cfg1 {
|
||
|
|
pins = "GPIO208_AH16"; /* CLK */
|
||
|
|
ste,config = <&slpm_out_lo_wkup_pdis>;
|
||
|
|
};
|
||
|
|
sleep_cfg2 {
|
||
|
|
pins =
|
||
|
|
"GPIO210_AJ15", /* CMD */
|
||
|
|
"GPIO211_AG14", /* DAT0 */
|
||
|
|
"GPIO212_AF13", /* DAT1 */
|
||
|
|
"GPIO213_AG13", /* DAT2 */
|
||
|
|
"GPIO214_AH15"; /* DAT3 */
|
||
|
|
ste,config = <&slpm_in_wkup_pdis>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
sdi2 {
|
||
|
|
/* This is the eMMC 8 bits wide, usually PoP eMMC */
|
||
|
|
mc2_a_1_default: mc2_a_1_default {
|
||
|
|
default_mux {
|
||
|
|
function = "mc2";
|
||
|
|
groups = "mc2_a_1";
|
||
|
|
};
|
||
|
|
default_cfg1 {
|
||
|
|
pins = "GPIO128_A5"; /* CLK */
|
||
|
|
ste,config = <&out_lo>;
|
||
|
|
};
|
||
|
|
default_cfg2 {
|
||
|
|
pins = "GPIO130_C8"; /* FBCLK */
|
||
|
|
ste,config = <&in_nopull>;
|
||
|
|
};
|
||
|
|
default_cfg3 {
|
||
|
|
pins =
|
||
|
|
"GPIO129_B4", /* CMD */
|
||
|
|
"GPIO131_A12", /* DAT0 */
|
||
|
|
"GPIO132_C10", /* DAT1 */
|
||
|
|
"GPIO133_B10", /* DAT2 */
|
||
|
|
"GPIO134_B9", /* DAT3 */
|
||
|
|
"GPIO135_A9", /* DAT4 */
|
||
|
|
"GPIO136_C7", /* DAT5 */
|
||
|
|
"GPIO137_A7", /* DAT6 */
|
||
|
|
"GPIO138_C5"; /* DAT7 */
|
||
|
|
ste,config = <&in_pu>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
mc2_a_1_sleep: mc2_a_1_sleep {
|
||
|
|
sleep_cfg1 {
|
||
|
|
pins = "GPIO128_A5"; /* CLK */
|
||
|
|
ste,config = <&out_lo_wkup_pdis>;
|
||
|
|
};
|
||
|
|
sleep_cfg2 {
|
||
|
|
pins =
|
||
|
|
"GPIO130_C8", /* FBCLK */
|
||
|
|
"GPIO129_B4"; /* CMD */
|
||
|
|
ste,config = <&in_wkup_pdis_en>;
|
||
|
|
};
|
||
|
|
sleep_cfg3 {
|
||
|
|
pins =
|
||
|
|
"GPIO131_A12", /* DAT0 */
|
||
|
|
"GPIO132_C10", /* DAT1 */
|
||
|
|
"GPIO133_B10", /* DAT2 */
|
||
|
|
"GPIO134_B9", /* DAT3 */
|
||
|
|
"GPIO135_A9", /* DAT4 */
|
||
|
|
"GPIO136_C7", /* DAT5 */
|
||
|
|
"GPIO137_A7", /* DAT6 */
|
||
|
|
"GPIO138_C5"; /* DAT7 */
|
||
|
|
ste,config = <&in_wkup_pdis>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
sdi4 {
|
||
|
|
/* This is the eMMC 8 bits wide, usually PCB-mounted eMMC */
|
||
|
|
mc4_a_1_default: mc4_a_1_default {
|
||
|
|
default_mux {
|
||
|
|
function = "mc4";
|
||
|
|
groups = "mc4_a_1";
|
||
|
|
};
|
||
|
|
default_cfg1 {
|
||
|
|
pins = "GPIO203_AE23"; /* CLK */
|
||
|
|
ste,config = <&out_lo>;
|
||
|
|
};
|
||
|
|
default_cfg2 {
|
||
|
|
pins = "GPIO202_AF25"; /* FBCLK */
|
||
|
|
ste,config = <&in_nopull>;
|
||
|
|
};
|
||
|
|
default_cfg3 {
|
||
|
|
pins =
|
||
|
|
"GPIO201_AF24", /* CMD */
|
||
|
|
"GPIO200_AH26", /* DAT0 */
|
||
|
|
"GPIO199_AH23", /* DAT1 */
|
||
|
|
"GPIO198_AG25", /* DAT2 */
|
||
|
|
"GPIO197_AH24", /* DAT3 */
|
||
|
|
"GPIO207_AJ23", /* DAT4 */
|
||
|
|
"GPIO206_AG24", /* DAT5 */
|
||
|
|
"GPIO205_AG23", /* DAT6 */
|
||
|
|
"GPIO204_AF23"; /* DAT7 */
|
||
|
|
ste,config = <&in_pu>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
mc4_a_1_sleep: mc4_a_1_sleep {
|
||
|
|
sleep_cfg1 {
|
||
|
|
pins = "GPIO203_AE23"; /* CLK */
|
||
|
|
ste,config = <&out_lo_wkup_pdis>;
|
||
|
|
};
|
||
|
|
sleep_cfg2 {
|
||
|
|
pins =
|
||
|
|
"GPIO202_AF25", /* FBCLK */
|
||
|
|
"GPIO201_AF24", /* CMD */
|
||
|
|
"GPIO200_AH26", /* DAT0 */
|
||
|
|
"GPIO199_AH23", /* DAT1 */
|
||
|
|
"GPIO198_AG25", /* DAT2 */
|
||
|
|
"GPIO197_AH24", /* DAT3 */
|
||
|
|
"GPIO207_AJ23", /* DAT4 */
|
||
|
|
"GPIO206_AG24", /* DAT5 */
|
||
|
|
"GPIO205_AG23", /* DAT6 */
|
||
|
|
"GPIO204_AF23"; /* DAT7 */
|
||
|
|
ste,config = <&slpm_in_wkup_pdis>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
/*
|
||
|
|
* Multi-rate serial ports (MSPs) - MSP3 output is internal and
|
||
|
|
* cannot be muxed onto any pins.
|
||
|
|
*/
|
||
|
|
msp0 {
|
||
|
|
msp0txrxtfstck_a_1_default: msp0txrxtfstck_a_1_default {
|
||
|
|
default_msp0_mux {
|
||
|
|
function = "msp0";
|
||
|
|
groups = "msp0txrx_a_1", "msp0tfstck_a_1";
|
||
|
|
};
|
||
|
|
default_msp0_cfg {
|
||
|
|
pins =
|
||
|
|
"GPIO12_AC4", /* TXD */
|
||
|
|
"GPIO15_AC3", /* RXD */
|
||
|
|
"GPIO13_AF3", /* TFS */
|
||
|
|
"GPIO14_AE3"; /* TCK */
|
||
|
|
ste,config = <&in_nopull>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
msp1 {
|
||
|
|
msp1txrx_a_1_default: msp1txrx_a_1_default {
|
||
|
|
default_mux {
|
||
|
|
function = "msp1";
|
||
|
|
groups = "msp1txrx_a_1", "msp1_a_1";
|
||
|
|
};
|
||
|
|
default_cfg1 {
|
||
|
|
pins = "GPIO33_AF2";
|
||
|
|
ste,config = <&out_lo>;
|
||
|
|
};
|
||
|
|
default_cfg2 {
|
||
|
|
pins =
|
||
|
|
"GPIO34_AE1",
|
||
|
|
"GPIO35_AE2",
|
||
|
|
"GPIO36_AG2";
|
||
|
|
ste,config = <&in_nopull>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
msp2 {
|
||
|
|
msp2_a_1_default: msp2_a_1_default {
|
||
|
|
/* MSP2 usually used for HDMI audio */
|
||
|
|
default_mux {
|
||
|
|
function = "msp2";
|
||
|
|
groups = "msp2_a_1";
|
||
|
|
};
|
||
|
|
default_cfg1 {
|
||
|
|
pins =
|
||
|
|
"GPIO193_AH27", /* TXD */
|
||
|
|
"GPIO194_AF27", /* TCK */
|
||
|
|
"GPIO195_AG28"; /* TFS */
|
||
|
|
ste,config = <&in_pd>;
|
||
|
|
};
|
||
|
|
default_cfg2 {
|
||
|
|
pins = "GPIO196_AG26"; /* RXD */
|
||
|
|
ste,config = <&out_lo>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
musb {
|
||
|
|
usb_a_1_default: usb_a_1_default {
|
||
|
|
default_mux {
|
||
|
|
function = "usb";
|
||
|
|
groups = "usb_a_1";
|
||
|
|
};
|
||
|
|
default_cfg1 {
|
||
|
|
pins =
|
||
|
|
"GPIO256_AF28", /* NXT */
|
||
|
|
"GPIO258_AD29", /* XCLK */
|
||
|
|
"GPIO259_AC29", /* DIR */
|
||
|
|
"GPIO260_AD28", /* DAT7 */
|
||
|
|
"GPIO261_AD26", /* DAT6 */
|
||
|
|
"GPIO262_AE26", /* DAT5 */
|
||
|
|
"GPIO263_AG29", /* DAT4 */
|
||
|
|
"GPIO264_AE27", /* DAT3 */
|
||
|
|
"GPIO265_AD27", /* DAT2 */
|
||
|
|
"GPIO266_AC28", /* DAT1 */
|
||
|
|
"GPIO267_AC27"; /* DAT0 */
|
||
|
|
ste,config = <&in_nopull>;
|
||
|
|
};
|
||
|
|
default_cfg2 {
|
||
|
|
pins = "GPIO257_AE29"; /* STP */
|
||
|
|
ste,config = <&out_hi>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
usb_a_1_sleep: usb_a_1_sleep {
|
||
|
|
sleep_cfg1 {
|
||
|
|
pins =
|
||
|
|
"GPIO256_AF28", /* NXT */
|
||
|
|
"GPIO258_AD29", /* XCLK */
|
||
|
|
"GPIO259_AC29"; /* DIR */
|
||
|
|
ste,config = <&slpm_wkup_pdis_en>;
|
||
|
|
};
|
||
|
|
sleep_cfg2 {
|
||
|
|
pins = "GPIO257_AE29"; /* STP */
|
||
|
|
ste,config = <&slpm_out_hi_wkup_pdis>;
|
||
|
|
};
|
||
|
|
sleep_cfg3 {
|
||
|
|
pins =
|
||
|
|
"GPIO260_AD28", /* DAT7 */
|
||
|
|
"GPIO261_AD26", /* DAT6 */
|
||
|
|
"GPIO262_AE26", /* DAT5 */
|
||
|
|
"GPIO263_AG29", /* DAT4 */
|
||
|
|
"GPIO264_AE27", /* DAT3 */
|
||
|
|
"GPIO265_AD27", /* DAT2 */
|
||
|
|
"GPIO266_AC28", /* DAT1 */
|
||
|
|
"GPIO267_AC27"; /* DAT0 */
|
||
|
|
ste,config = <&slpm_in_wkup_pdis_en>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|