148 lines
2.9 KiB
Plaintext
148 lines
2.9 KiB
Plaintext
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* RDA8810PL SoC
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*
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* Copyright (c) 2017 Andreas Färber
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* Copyright (c) 2018 Manivannan Sadhasivam
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*/
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#include <dt-bindings/interrupt-controller/irq.h>
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/ {
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compatible = "rda,8810pl";
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interrupt-parent = <&intc>;
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#address-cells = <1>;
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#size-cells = <1>;
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a5";
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reg = <0x0>;
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};
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};
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sram@100000 {
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compatible = "mmio-sram";
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reg = <0x100000 0x10000>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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};
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modem@10000000 {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x10000000 0xfffffff>;
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gpioc@1a08000 {
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compatible = "rda,8810pl-gpio";
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reg = <0x1a08000 0x1000>;
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gpio-controller;
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#gpio-cells = <2>;
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ngpios = <32>;
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};
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};
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apb@20800000 {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x20800000 0x100000>;
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intc: interrupt-controller@0 {
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compatible = "rda,8810pl-intc";
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reg = <0x0 0x1000>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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};
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apb@20900000 {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x20900000 0x100000>;
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timer@10000 {
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compatible = "rda,8810pl-timer";
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reg = <0x10000 0x1000>;
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interrupts = <16 IRQ_TYPE_LEVEL_HIGH>,
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<17 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "hwtimer", "ostimer";
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};
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gpioa@30000 {
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compatible = "rda,8810pl-gpio";
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reg = <0x30000 0x1000>;
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gpio-controller;
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#gpio-cells = <2>;
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ngpios = <32>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupts = <12 IRQ_TYPE_LEVEL_HIGH>;
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};
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gpiob@31000 {
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compatible = "rda,8810pl-gpio";
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reg = <0x31000 0x1000>;
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gpio-controller;
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#gpio-cells = <2>;
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ngpios = <32>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupts = <13 IRQ_TYPE_LEVEL_HIGH>;
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};
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gpiod@32000 {
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compatible = "rda,8810pl-gpio";
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reg = <0x32000 0x1000>;
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gpio-controller;
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#gpio-cells = <2>;
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ngpios = <32>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupts = <14 IRQ_TYPE_LEVEL_HIGH>;
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};
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};
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apb@20a00000 {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x20a00000 0x100000>;
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uart1: serial@0 {
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compatible = "rda,8810pl-uart";
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reg = <0x0 0x1000>;
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interrupts = <9 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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uart2: serial@10000 {
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compatible = "rda,8810pl-uart";
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reg = <0x10000 0x1000>;
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interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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uart3: serial@90000 {
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compatible = "rda,8810pl-uart";
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reg = <0x90000 0x1000>;
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interrupts = <11 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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};
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l2: cache-controller@21100000 {
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compatible = "arm,pl310-cache";
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reg = <0x21100000 0x1000>;
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cache-unified;
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cache-level = <2>;
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};
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};
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