738 lines
18 KiB
Plaintext
738 lines
18 KiB
Plaintext
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// SPDX-License-Identifier: GPL-2.0-only
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/dts-v1/;
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#include <dt-bindings/input/input.h>
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#include "omap443x.dtsi"
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#include "motorola-cpcap-mapphone.dtsi"
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/ {
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chosen {
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stdout-path = &uart3;
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};
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aliases {
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display0 = &lcd0;
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display1 = &hdmi0;
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};
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/*
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* We seem to have only 1021 MB accessible, 1021 - 1022 is locked,
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* then 1023 - 1024 seems to contain mbm.
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*/
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memory {
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device_type = "memory";
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reg = <0x80000000 0x3fd00000>; /* 1021 MB */
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};
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/* Poweroff GPIO probably connected to CPCAP */
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gpio-poweroff {
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compatible = "gpio-poweroff";
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pinctrl-0 = <&poweroff_gpio>;
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pinctrl-names = "default";
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gpios = <&gpio2 18 GPIO_ACTIVE_LOW>; /* gpio50 */
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};
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hdmi0: connector {
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compatible = "hdmi-connector";
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pinctrl-0 = <&hdmi_hpd_gpio>;
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pinctrl-names = "default";
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label = "hdmi";
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type = "d";
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hpd-gpios = <&gpio2 31 GPIO_ACTIVE_HIGH>; /* gpio63 */
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port {
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hdmi_connector_in: endpoint {
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remote-endpoint = <&hdmi_out>;
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};
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};
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};
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/*
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* HDMI 5V regulator probably sourced from battery. Let's keep
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* keep this as always enabled for HDMI to work until we've
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* figured what the encoder chip is.
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*/
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hdmi_regulator: regulator-hdmi {
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compatible = "regulator-fixed";
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regulator-name = "hdmi";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpio2 27 GPIO_ACTIVE_HIGH>; /* gpio59 */
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enable-active-high;
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regulator-always-on;
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};
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/* FS USB Host PHY on port 1 for mdm6600 */
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fsusb1_phy: usb-phy@1 {
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compatible = "motorola,mapphone-mdm6600";
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pinctrl-0 = <&usb_mdm6600_pins>;
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pinctrl-names = "default";
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enable-gpios = <&gpio3 31 GPIO_ACTIVE_LOW>; /* gpio_95 */
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power-gpios = <&gpio2 22 GPIO_ACTIVE_HIGH>; /* gpio_54 */
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reset-gpios = <&gpio2 17 GPIO_ACTIVE_HIGH>; /* gpio_49 */
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/* mode: gpio_148 gpio_149 */
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motorola,mode-gpios = <&gpio5 20 GPIO_ACTIVE_HIGH>,
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<&gpio5 21 GPIO_ACTIVE_HIGH>;
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/* cmd: gpio_103 gpio_104 gpio_142 */
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motorola,cmd-gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>,
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<&gpio4 8 GPIO_ACTIVE_HIGH>,
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<&gpio5 14 GPIO_ACTIVE_HIGH>;
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/* status: gpio_52 gpio_53 gpio_55 */
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motorola,status-gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>,
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<&gpio2 21 GPIO_ACTIVE_HIGH>,
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<&gpio2 23 GPIO_ACTIVE_HIGH>;
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#phy-cells = <0>;
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};
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/* HS USB host TLL nop-phy on port 2 for w3glte */
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hsusb2_phy: usb-phy@2 {
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compatible = "usb-nop-xceiv";
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#phy-cells = <0>;
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};
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/* LCD regulator from sw5 source */
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lcd_regulator: regulator-lcd {
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compatible = "regulator-fixed";
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regulator-name = "lcd";
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regulator-min-microvolt = <5050000>;
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regulator-max-microvolt = <5050000>;
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gpio = <&gpio4 0 GPIO_ACTIVE_HIGH>; /* gpio96 */
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enable-active-high;
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vin-supply = <&sw5>;
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};
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/* This is probably coming straight from the battery.. */
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wl12xx_vmmc: regulator-wl12xx {
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compatible = "regulator-fixed";
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regulator-name = "vwl1271";
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regulator-min-microvolt = <1650000>;
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regulator-max-microvolt = <1650000>;
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gpio = <&gpio3 30 GPIO_ACTIVE_HIGH>; /* gpio94 */
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startup-delay-us = <70000>;
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enable-active-high;
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};
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soundcard {
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compatible = "audio-graph-card";
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label = "Mapphone Audio";
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widgets =
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"Speaker", "Earpiece",
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"Speaker", "Loudspeaker",
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"Headphone", "Headphone Jack",
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"Microphone", "Internal Mic";
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routing =
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"Earpiece", "EP",
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"Loudspeaker", "SPKR",
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"Headphone Jack", "HSL",
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"Headphone Jack", "HSR",
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"MICR", "Internal Mic";
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dais = <&mcbsp2_port>, <&mcbsp3_port>;
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};
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pwm8: dmtimer-pwm-8 {
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pinctrl-names = "default";
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pinctrl-0 = <&vibrator_direction_pin>;
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compatible = "ti,omap-dmtimer-pwm";
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#pwm-cells = <3>;
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ti,timers = <&timer8>;
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ti,clock-source = <0x01>;
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};
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pwm9: dmtimer-pwm-9 {
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pinctrl-names = "default";
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pinctrl-0 = <&vibrator_enable_pin>;
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compatible = "ti,omap-dmtimer-pwm";
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#pwm-cells = <3>;
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ti,timers = <&timer9>;
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ti,clock-source = <0x01>;
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};
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vibrator {
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compatible = "pwm-vibrator";
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pwms = <&pwm9 0 10000000 0>, <&pwm8 0 10000000 0>;
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pwm-names = "enable", "direction";
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direction-duty-cycle-ns = <10000000>;
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};
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backlight: backlight {
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compatible = "led-backlight";
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leds = <&backlight_led>;
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brightness-levels = <31 63 95 127 159 191 223 255>;
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default-brightness-level = <6>;
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};
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};
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&cpu_thermal {
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polling-delay = <10000>; /* milliseconds */
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};
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&cpu_alert0 {
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temperature = <80000>; /* millicelsius */
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};
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&cpu0 {
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/*
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* Note that the 1.2GiHz mode is enabled for all SoC variants for
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* the Motorola Android Linux v3.0.8 based kernel.
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*/
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operating-points = <
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/* kHz uV */
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300000 1025000
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600000 1200000
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800000 1313000
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1008000 1375000
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1200000 1375000
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>;
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};
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&dss {
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status = "okay";
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};
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&dsi1 {
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status = "okay";
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vdd-supply = <&vcsi>;
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port {
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dsi1_out_ep: endpoint {
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remote-endpoint = <&lcd0_in>;
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lanes = <0 1 2 3 4 5>;
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};
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};
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lcd0: panel@0 {
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compatible = "motorola,droid4-panel", "panel-dsi-cm";
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reg = <0>;
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label = "lcd0";
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vddi-supply = <&lcd_regulator>;
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reset-gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>; /* gpio101 */
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backlight = <&backlight>;
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width-mm = <50>;
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height-mm = <89>;
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rotation = <90>;
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panel-timing {
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clock-frequency = <0>; /* Calculated by dsi */
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hback-porch = <2>;
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hactive = <540>;
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hfront-porch = <0>;
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hsync-len = <2>;
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vback-porch = <1>;
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vactive = <960>;
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vfront-porch = <0>;
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vsync-len = <1>;
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hsync-active = <0>;
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vsync-active = <0>;
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de-active = <1>;
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pixelclk-active = <1>;
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};
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port {
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lcd0_in: endpoint {
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remote-endpoint = <&dsi1_out_ep>;
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};
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};
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};
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};
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&hdmi {
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status = "okay";
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pinctrl-0 = <&dss_hdmi_pins>;
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pinctrl-names = "default";
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vdda-supply = <&vdac>;
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port {
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hdmi_out: endpoint {
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remote-endpoint = <&hdmi_connector_in>;
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lanes = <1 0 3 2 5 4 7 6>;
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};
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};
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};
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/* Battery NVRAM on 1-wire handled by w1_ds250x driver */
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&hdqw1w {
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pinctrl-0 = <&hdq_pins>;
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pinctrl-names = "default";
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ti,mode = "1w";
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};
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&i2c1 {
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tmp105@48 {
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compatible = "ti,tmp105";
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reg = <0x48>;
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pinctrl-0 = <&tmp105_irq>;
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pinctrl-names = "default";
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/* kpd_row0.gpio_178 */
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interrupts-extended = <&gpio6 18 IRQ_TYPE_EDGE_FALLING
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&omap4_pmx_core 0x14e>;
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interrupt-names = "irq", "wakeup";
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wakeup-source;
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};
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};
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&mmc1 {
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vmmc-supply = <&vwlan2>;
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bus-width = <4>;
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cd-gpios = <&gpio6 16 GPIO_ACTIVE_LOW>; /* gpio176 */
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};
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&mmc2 {
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vmmc-supply = <&vsdio>;
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bus-width = <8>;
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ti,non-removable;
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};
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&mmc3 {
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pinctrl-names = "default";
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pinctrl-0 = <&mmc3_pins>;
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vmmc-supply = <&wl12xx_vmmc>;
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/* uart2_tx.sdmmc3_dat1 pad as wakeirq */
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interrupts-extended = <&wakeupgen GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH
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&omap4_pmx_core 0xde>;
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interrupt-names = "irq", "wakeup";
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non-removable;
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bus-width = <4>;
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cap-power-off-card;
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keep-power-in-suspend;
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#address-cells = <1>;
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#size-cells = <0>;
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wlcore: wlcore@2 {
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compatible = "ti,wl1285";
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reg = <2>;
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/* gpio_100 with gpmc_wait2 pad as wakeirq */
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interrupts-extended = <&gpio4 4 IRQ_TYPE_LEVEL_HIGH>,
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<&omap4_pmx_core 0x4e>;
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interrupt-names = "irq", "wakeup";
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ref-clock-frequency = <26000000>;
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tcxo-clock-frequency = <26000000>;
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};
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};
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&i2c2 {
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touchscreen@4a {
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compatible = "atmel,maxtouch";
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reg = <0x4a>;
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pinctrl-names = "default";
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pinctrl-0 = <&touchscreen_pins>;
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reset-gpios = <&gpio6 13 GPIO_ACTIVE_LOW>; /* gpio173 */
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/* gpio_183 with sys_nirq2 pad as wakeup */
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interrupts-extended = <&gpio6 23 IRQ_TYPE_LEVEL_LOW>,
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<&omap4_pmx_core 0x160>;
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interrupt-names = "irq", "wakeup";
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wakeup-source;
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};
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isl29030@44 {
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compatible = "isil,isl29030";
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reg = <0x44>;
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pinctrl-names = "default";
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pinctrl-0 = <&als_proximity_pins>;
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interrupt-parent = <&gpio6>;
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interrupts = <17 IRQ_TYPE_LEVEL_LOW>; /* gpio177 */
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};
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};
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&omap4_pmx_core {
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/* hdmi_hpd.gpio_63 */
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hdmi_hpd_gpio: pinmux_hdmi_hpd_pins {
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pinctrl-single,pins = <
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OMAP4_IOPAD(0x098, PIN_INPUT | MUX_MODE3)
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>;
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};
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hdq_pins: pinmux_hdq_pins {
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pinctrl-single,pins = <
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/* 0x4a100120 hdq_sio.hdq_sio aa27 */
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OMAP4_IOPAD(0x120, PIN_INPUT | MUX_MODE0)
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>;
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};
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/* hdmi_cec.hdmi_cec, hdmi_scl.hdmi_scl, hdmi_sda.hdmi_sda */
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dss_hdmi_pins: pinmux_dss_hdmi_pins {
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pinctrl-single,pins = <
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OMAP4_IOPAD(0x09a, PIN_INPUT | MUX_MODE0)
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OMAP4_IOPAD(0x09c, PIN_INPUT | MUX_MODE0)
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OMAP4_IOPAD(0x09e, PIN_INPUT | MUX_MODE0)
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>;
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};
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/*
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|
|
* Android uses PIN_OFF_INPUT_PULLDOWN | PIN_INPUT_PULLUP | MUX_MODE3
|
||
|
|
* for gpio_100, but the internal pull makes wlan flakey on some
|
||
|
|
* devices. Off mode value should be tested if we have off mode working
|
||
|
|
* later on.
|
||
|
|
*/
|
||
|
|
mmc3_pins: pinmux_mmc3_pins {
|
||
|
|
pinctrl-single,pins = <
|
||
|
|
/* 0x4a10008e gpmc_wait2.gpio_100 d23 */
|
||
|
|
OMAP4_IOPAD(0x08e, PIN_INPUT | MUX_MODE3)
|
||
|
|
|
||
|
|
/* 0x4a100102 abe_mcbsp1_dx.sdmmc3_dat2 ab25 */
|
||
|
|
OMAP4_IOPAD(0x102, PIN_INPUT_PULLUP | MUX_MODE1)
|
||
|
|
|
||
|
|
/* 0x4a100104 abe_mcbsp1_fsx.sdmmc3_dat3 ac27 */
|
||
|
|
OMAP4_IOPAD(0x104, PIN_INPUT_PULLUP | MUX_MODE1)
|
||
|
|
|
||
|
|
/* 0x4a100118 uart2_cts.sdmmc3_clk ab26 */
|
||
|
|
OMAP4_IOPAD(0x118, PIN_INPUT | MUX_MODE1)
|
||
|
|
|
||
|
|
/* 0x4a10011a uart2_rts.sdmmc3_cmd ab27 */
|
||
|
|
OMAP4_IOPAD(0x11a, PIN_INPUT_PULLUP | MUX_MODE1)
|
||
|
|
|
||
|
|
/* 0x4a10011c uart2_rx.sdmmc3_dat0 aa25 */
|
||
|
|
OMAP4_IOPAD(0x11c, PIN_INPUT_PULLUP | MUX_MODE1)
|
||
|
|
|
||
|
|
/* 0x4a10011e uart2_tx.sdmmc3_dat1 aa26 */
|
||
|
|
OMAP4_IOPAD(0x11e, PIN_INPUT_PULLUP | MUX_MODE1)
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
/* gpmc_ncs0.gpio_50 */
|
||
|
|
poweroff_gpio: pinmux_poweroff_pins {
|
||
|
|
pinctrl-single,pins = <
|
||
|
|
OMAP4_IOPAD(0x074, PIN_OUTPUT_PULLUP | MUX_MODE3)
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
/* kpd_row0.gpio_178 */
|
||
|
|
tmp105_irq: pinmux_tmp105_irq {
|
||
|
|
pinctrl-single,pins = <
|
||
|
|
OMAP4_IOPAD(0x18e, PIN_INPUT_PULLUP | MUX_MODE3)
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
usb_gpio_mux_sel1: pinmux_usb_gpio_mux_sel1_pins {
|
||
|
|
/* gpio_60 */
|
||
|
|
pinctrl-single,pins = <
|
||
|
|
OMAP4_IOPAD(0x088, PIN_OUTPUT | MUX_MODE3)
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
touchscreen_pins: pinmux_touchscreen_pins {
|
||
|
|
pinctrl-single,pins = <
|
||
|
|
OMAP4_IOPAD(0x180, PIN_OUTPUT | MUX_MODE3)
|
||
|
|
OMAP4_IOPAD(0x1a0, PIN_INPUT_PULLUP | MUX_MODE3)
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
als_proximity_pins: pinmux_als_proximity_pins {
|
||
|
|
pinctrl-single,pins = <
|
||
|
|
OMAP4_IOPAD(0x18c, PIN_INPUT_PULLUP | MUX_MODE3)
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
usb_mdm6600_pins: pinmux_usb_mdm6600_pins {
|
||
|
|
pinctrl-single,pins = <
|
||
|
|
/* enable 0x4a1000d8 usbb1_ulpitll_dat7.gpio_95 ag16 */
|
||
|
|
OMAP4_IOPAD(0x0d8, PIN_INPUT | MUX_MODE3)
|
||
|
|
|
||
|
|
/* power 0x4a10007c gpmc_nwp.gpio_54 c25 */
|
||
|
|
OMAP4_IOPAD(0x07c, PIN_OUTPUT | MUX_MODE3)
|
||
|
|
|
||
|
|
/* reset 0x4a100072 gpmc_a25.gpio_49 d20 */
|
||
|
|
OMAP4_IOPAD(0x072, PIN_OUTPUT | MUX_MODE3)
|
||
|
|
|
||
|
|
/* mode0/bpwake 0x4a10014e sdmmc5_dat1.gpio_148 af4 */
|
||
|
|
OMAP4_IOPAD(0x14e, PIN_OUTPUT | MUX_MODE3)
|
||
|
|
|
||
|
|
/* mode1/apwake 0x4a100150 sdmmc5_dat2.gpio_149 ag3 */
|
||
|
|
OMAP4_IOPAD(0x150, PIN_OFF_OUTPUT_LOW | PIN_INPUT | MUX_MODE3)
|
||
|
|
|
||
|
|
/* status0 0x4a10007e gpmc_clk.gpio_55 b22 */
|
||
|
|
OMAP4_IOPAD(0x07e, PIN_INPUT | MUX_MODE3)
|
||
|
|
|
||
|
|
/* status1 0x4a10007a gpmc_ncs3.gpio_53 c22 */
|
||
|
|
OMAP4_IOPAD(0x07a, PIN_INPUT | MUX_MODE3)
|
||
|
|
|
||
|
|
/* status2 0x4a100078 gpmc_ncs2.gpio_52 d21 */
|
||
|
|
OMAP4_IOPAD(0x078, PIN_INPUT | MUX_MODE3)
|
||
|
|
|
||
|
|
/* cmd0 0x4a100094 gpmc_ncs6.gpio_103 c24 */
|
||
|
|
OMAP4_IOPAD(0x094, PIN_OUTPUT | MUX_MODE3)
|
||
|
|
|
||
|
|
/* cmd1 0x4a100096 gpmc_ncs7.gpio_104 d24 */
|
||
|
|
OMAP4_IOPAD(0x096, PIN_OUTPUT | MUX_MODE3)
|
||
|
|
|
||
|
|
/* cmd2 0x4a100142 uart3_rts_sd.gpio_142 f28 */
|
||
|
|
OMAP4_IOPAD(0x142, PIN_OUTPUT | MUX_MODE3)
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
usb_ulpi_pins: pinmux_usb_ulpi_pins {
|
||
|
|
pinctrl-single,pins = <
|
||
|
|
OMAP4_IOPAD(0x196, MUX_MODE7)
|
||
|
|
OMAP4_IOPAD(0x198, MUX_MODE7)
|
||
|
|
OMAP4_IOPAD(0x1b2, PIN_INPUT_PULLUP | MUX_MODE0)
|
||
|
|
OMAP4_IOPAD(0x1b4, PIN_INPUT_PULLUP | MUX_MODE0)
|
||
|
|
OMAP4_IOPAD(0x1b6, PIN_INPUT_PULLUP | MUX_MODE0)
|
||
|
|
OMAP4_IOPAD(0x1b8, PIN_INPUT_PULLUP | MUX_MODE0)
|
||
|
|
OMAP4_IOPAD(0x1ba, PIN_INPUT_PULLUP | MUX_MODE0)
|
||
|
|
OMAP4_IOPAD(0x1bc, PIN_INPUT_PULLUP | MUX_MODE0)
|
||
|
|
OMAP4_IOPAD(0x1be, PIN_INPUT_PULLUP | MUX_MODE0)
|
||
|
|
OMAP4_IOPAD(0x1c0, PIN_INPUT_PULLUP | MUX_MODE0)
|
||
|
|
OMAP4_IOPAD(0x1c2, PIN_INPUT_PULLUP | MUX_MODE0)
|
||
|
|
OMAP4_IOPAD(0x1c4, PIN_INPUT_PULLUP | MUX_MODE0)
|
||
|
|
OMAP4_IOPAD(0x1c6, PIN_INPUT_PULLUP | MUX_MODE0)
|
||
|
|
OMAP4_IOPAD(0x1c8, PIN_INPUT_PULLUP | MUX_MODE0)
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
/* usb0_otg_dp and usb0_otg_dm */
|
||
|
|
usb_utmi_pins: pinmux_usb_utmi_pins {
|
||
|
|
pinctrl-single,pins = <
|
||
|
|
OMAP4_IOPAD(0x196, PIN_INPUT | MUX_MODE0)
|
||
|
|
OMAP4_IOPAD(0x198, PIN_INPUT | MUX_MODE0)
|
||
|
|
OMAP4_IOPAD(0x1b2, PIN_INPUT_PULLUP | MUX_MODE7)
|
||
|
|
OMAP4_IOPAD(0x1b4, PIN_INPUT_PULLUP | MUX_MODE7)
|
||
|
|
OMAP4_IOPAD(0x1b6, PIN_INPUT_PULLUP | MUX_MODE7)
|
||
|
|
OMAP4_IOPAD(0x1b8, PIN_INPUT_PULLUP | MUX_MODE7)
|
||
|
|
OMAP4_IOPAD(0x1ba, PIN_INPUT_PULLUP | MUX_MODE7)
|
||
|
|
OMAP4_IOPAD(0x1bc, PIN_INPUT_PULLUP | MUX_MODE7)
|
||
|
|
OMAP4_IOPAD(0x1be, PIN_INPUT_PULLUP | MUX_MODE7)
|
||
|
|
OMAP4_IOPAD(0x1c0, PIN_INPUT_PULLUP | MUX_MODE7)
|
||
|
|
OMAP4_IOPAD(0x1c2, PIN_INPUT_PULLUP | MUX_MODE7)
|
||
|
|
OMAP4_IOPAD(0x1c4, PIN_INPUT_PULLUP | MUX_MODE7)
|
||
|
|
OMAP4_IOPAD(0x1c6, PIN_INPUT_PULLUP | MUX_MODE7)
|
||
|
|
OMAP4_IOPAD(0x1c8, PIN_INPUT_PULLUP | MUX_MODE7)
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
/*
|
||
|
|
* Note that the v3.0.8 stock userspace dynamically remuxes uart1
|
||
|
|
* rts pin probably for PM purposes to PIN_INPUT_PULLUP | MUX_MODE7
|
||
|
|
* when not used. If needed, we can add rts pin remux later based
|
||
|
|
* on power measurements.
|
||
|
|
*/
|
||
|
|
uart1_pins: pinmux_uart1_pins {
|
||
|
|
pinctrl-single,pins = <
|
||
|
|
/* 0x4a10013c mcspi1_cs2.uart1_cts ag23 */
|
||
|
|
OMAP4_IOPAD(0x13c, PIN_INPUT_PULLUP | MUX_MODE1)
|
||
|
|
|
||
|
|
/* 0x4a10013e mcspi1_cs3.uart1_rts ah23 */
|
||
|
|
OMAP4_IOPAD(0x13e, MUX_MODE1)
|
||
|
|
|
||
|
|
/* 0x4a100140 uart3_cts_rctx.uart1_tx f27 */
|
||
|
|
OMAP4_IOPAD(0x140, PIN_OUTPUT | MUX_MODE1)
|
||
|
|
|
||
|
|
/* 0x4a1001ca dpm_emu14.uart1_rx aa3 */
|
||
|
|
OMAP4_IOPAD(0x1ca, PIN_INPUT_PULLUP | MUX_MODE2)
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
/* uart3_tx_irtx and uart3_rx_irrx */
|
||
|
|
uart3_pins: pinmux_uart3_pins {
|
||
|
|
pinctrl-single,pins = <
|
||
|
|
OMAP4_IOPAD(0x196, MUX_MODE7)
|
||
|
|
OMAP4_IOPAD(0x198, MUX_MODE7)
|
||
|
|
OMAP4_IOPAD(0x1b2, PIN_INPUT_PULLUP | MUX_MODE7)
|
||
|
|
OMAP4_IOPAD(0x1b4, PIN_INPUT_PULLUP | MUX_MODE7)
|
||
|
|
OMAP4_IOPAD(0x1b6, PIN_INPUT_PULLUP | MUX_MODE7)
|
||
|
|
OMAP4_IOPAD(0x1b8, PIN_INPUT_PULLUP | MUX_MODE7)
|
||
|
|
OMAP4_IOPAD(0x1ba, MUX_MODE2)
|
||
|
|
OMAP4_IOPAD(0x1bc, PIN_INPUT | MUX_MODE2)
|
||
|
|
OMAP4_IOPAD(0x1be, PIN_INPUT_PULLUP | MUX_MODE7)
|
||
|
|
OMAP4_IOPAD(0x1c0, PIN_INPUT_PULLUP | MUX_MODE7)
|
||
|
|
OMAP4_IOPAD(0x1c2, PIN_INPUT_PULLUP | MUX_MODE7)
|
||
|
|
OMAP4_IOPAD(0x1c4, PIN_INPUT_PULLUP | MUX_MODE7)
|
||
|
|
OMAP4_IOPAD(0x1c6, PIN_INPUT_PULLUP | MUX_MODE7)
|
||
|
|
OMAP4_IOPAD(0x1c8, PIN_INPUT_PULLUP | MUX_MODE7)
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
uart4_pins: pinmux_uart4_pins {
|
||
|
|
pinctrl-single,pins = <
|
||
|
|
OMAP4_IOPAD(0x15c, PIN_INPUT | MUX_MODE0) /* uart4_rx */
|
||
|
|
OMAP4_IOPAD(0x15e, PIN_OUTPUT | MUX_MODE0) /* uart4_tx */
|
||
|
|
OMAP4_IOPAD(0x110, PIN_INPUT_PULLUP | MUX_MODE5) /* uart4_cts */
|
||
|
|
OMAP4_IOPAD(0x112, PIN_OUTPUT_PULLUP | MUX_MODE5) /* uart4_rts */
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
mcbsp2_pins: pinmux_mcbsp2_pins {
|
||
|
|
pinctrl-single,pins = <
|
||
|
|
OMAP4_IOPAD(0x0f6, PIN_INPUT | MUX_MODE0) /* abe_mcbsp2_clkx */
|
||
|
|
OMAP4_IOPAD(0x0f8, PIN_INPUT | MUX_MODE0) /* abe_mcbsp2_dr */
|
||
|
|
OMAP4_IOPAD(0x0fa, PIN_OUTPUT | MUX_MODE0) /* abe_mcbsp2_dx */
|
||
|
|
OMAP4_IOPAD(0x0fc, PIN_INPUT | MUX_MODE0) /* abe_mcbsp2_fsx */
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
mcbsp3_pins: pinmux_mcbsp3_pins {
|
||
|
|
pinctrl-single,pins = <
|
||
|
|
OMAP4_IOPAD(0x106, PIN_INPUT | MUX_MODE1) /* abe_mcbsp3_dr */
|
||
|
|
OMAP4_IOPAD(0x108, PIN_OUTPUT | MUX_MODE1) /* abe_mcbsp3_dx */
|
||
|
|
OMAP4_IOPAD(0x10a, PIN_INPUT | MUX_MODE1) /* abe_mcbsp3_clkx */
|
||
|
|
OMAP4_IOPAD(0x10c, PIN_INPUT | MUX_MODE1) /* abe_mcbsp3_fsx */
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
vibrator_direction_pin: pinmux_vibrator_direction_pin {
|
||
|
|
pinctrl-single,pins = <
|
||
|
|
OMAP4_IOPAD(0x1ce, PIN_OUTPUT | MUX_MODE1) /* dmtimer8_pwm_evt (gpio_27) */
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
|
||
|
|
vibrator_enable_pin: pinmux_vibrator_enable_pin {
|
||
|
|
pinctrl-single,pins = <
|
||
|
|
OMAP4_IOPAD(0X1d0, PIN_OUTPUT | MUX_MODE1) /* dmtimer9_pwm_evt (gpio_28) */
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
&omap4_pmx_wkup {
|
||
|
|
usb_gpio_mux_sel2: pinmux_usb_gpio_mux_sel2_pins {
|
||
|
|
/* gpio_wk0 */
|
||
|
|
pinctrl-single,pins = <
|
||
|
|
OMAP4_IOPAD(0x040, PIN_OUTPUT_PULLDOWN | MUX_MODE3)
|
||
|
|
>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
/* RNG is used by secure mode and not accessible */
|
||
|
|
&rng_target {
|
||
|
|
status = "disabled";
|
||
|
|
};
|
||
|
|
|
||
|
|
/* Configure pwm clock source for timers 8 & 9 */
|
||
|
|
&timer8 {
|
||
|
|
assigned-clocks = <&abe_clkctrl OMAP4_TIMER8_CLKCTRL 24>;
|
||
|
|
assigned-clock-parents = <&sys_clkin_ck>;
|
||
|
|
};
|
||
|
|
|
||
|
|
&timer9 {
|
||
|
|
assigned-clocks = <&l4_per_clkctrl OMAP4_TIMER9_CLKCTRL 24>;
|
||
|
|
assigned-clock-parents = <&sys_clkin_ck>;
|
||
|
|
};
|
||
|
|
|
||
|
|
/*
|
||
|
|
* The uart1 port is wired to mdm6600 with rts and cts. The modem uses gpio_149
|
||
|
|
* for wake-up events for both the USB PHY and the UART. We can use gpio_149
|
||
|
|
* pad as the shared wakeirq for the UART rather than the RX or CTS pad as we
|
||
|
|
* have gpio_149 trigger before the UART transfer starts.
|
||
|
|
*/
|
||
|
|
&uart1 {
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <&uart1_pins>;
|
||
|
|
interrupts-extended = <&wakeupgen GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH
|
||
|
|
&omap4_pmx_core 0x110>;
|
||
|
|
uart-has-rtscts;
|
||
|
|
current-speed = <115200>;
|
||
|
|
};
|
||
|
|
|
||
|
|
&uart3 {
|
||
|
|
interrupts-extended = <&wakeupgen GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH
|
||
|
|
&omap4_pmx_core 0x17c>;
|
||
|
|
};
|
||
|
|
|
||
|
|
&uart4 {
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <&uart4_pins>;
|
||
|
|
|
||
|
|
bluetooth {
|
||
|
|
compatible = "ti,wl1285-st";
|
||
|
|
enable-gpios = <&gpio6 14 GPIO_ACTIVE_HIGH>; /* gpio 174 */
|
||
|
|
max-speed = <3686400>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
&usbhsohci {
|
||
|
|
phys = <&fsusb1_phy>;
|
||
|
|
phy-names = "usb";
|
||
|
|
};
|
||
|
|
|
||
|
|
&usbhsehci {
|
||
|
|
phys = <&hsusb2_phy>;
|
||
|
|
};
|
||
|
|
|
||
|
|
&usbhshost {
|
||
|
|
port1-mode = "ohci-phy-4pin-dpdm";
|
||
|
|
port2-mode = "ehci-tll";
|
||
|
|
};
|
||
|
|
|
||
|
|
/* Internal UTMI+ PHY used for OTG, CPCAP ULPI PHY for detection and charger */
|
||
|
|
&usb_otg_hs {
|
||
|
|
interface-type = <1>;
|
||
|
|
mode = <3>;
|
||
|
|
|
||
|
|
/*
|
||
|
|
* Max 300 mA steps based on similar PMIC MC13783UG.pdf "Table 10-4.
|
||
|
|
* VBUS Regulator Main Characteristics". Binding uses 2 mA units.
|
||
|
|
*/
|
||
|
|
power = <150>;
|
||
|
|
};
|
||
|
|
|
||
|
|
&i2c4 {
|
||
|
|
ak8975: magnetometer@c {
|
||
|
|
compatible = "asahi-kasei,ak8975";
|
||
|
|
reg = <0x0c>;
|
||
|
|
|
||
|
|
vdd-supply = <&vhvio>;
|
||
|
|
|
||
|
|
interrupt-parent = <&gpio6>;
|
||
|
|
interrupts = <15 IRQ_TYPE_EDGE_RISING>; /* gpio175 */
|
||
|
|
|
||
|
|
rotation-matrix = "-1", "0", "0",
|
||
|
|
"0", "1", "0",
|
||
|
|
"0", "0", "-1";
|
||
|
|
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
&mcbsp2 {
|
||
|
|
#sound-dai-cells = <0>;
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <&mcbsp2_pins>;
|
||
|
|
status = "okay";
|
||
|
|
|
||
|
|
mcbsp2_port: port {
|
||
|
|
cpu_dai2: endpoint {
|
||
|
|
dai-format = "i2s";
|
||
|
|
remote-endpoint = <&cpcap_audio_codec0>;
|
||
|
|
frame-master = <&cpcap_audio_codec0>;
|
||
|
|
bitclock-master = <&cpcap_audio_codec0>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
&mcbsp3 {
|
||
|
|
#sound-dai-cells = <0>;
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <&mcbsp3_pins>;
|
||
|
|
status = "okay";
|
||
|
|
|
||
|
|
mcbsp3_port: port {
|
||
|
|
cpu_dai3: endpoint {
|
||
|
|
dai-format = "dsp_a";
|
||
|
|
frame-master = <&cpcap_audio_codec1>;
|
||
|
|
bitclock-master = <&cpcap_audio_codec1>;
|
||
|
|
remote-endpoint = <&cpcap_audio_codec1>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
&cpcap_audio_codec0 {
|
||
|
|
remote-endpoint = <&cpu_dai2>;
|
||
|
|
};
|
||
|
|
|
||
|
|
&cpcap_audio_codec1 {
|
||
|
|
remote-endpoint = <&cpu_dai3>;
|
||
|
|
};
|