43 lines
1.1 KiB
Plaintext
43 lines
1.1 KiB
Plaintext
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// SPDX-License-Identifier: GPL-2.0 OR MIT
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//
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// Copyright 2019 Armadeus Systems <support@armadeus.com>
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/dts-v1/;
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#include "imx6ull-opos6ul.dtsi"
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#include "imx6ul-imx6ull-opos6uldev.dtsi"
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/ {
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model = "Armadeus Systems OPOS6UL SoM (i.MX6ULL) on OPOS6ULDev board";
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compatible = "armadeus,imx6ull-opos6uldev", "armadeus,imx6ull-opos6ul", "fsl,imx6ull";
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};
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&iomuxc_snvs {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_tamper_gpios>;
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pinctrl_tamper_gpios: tampergpiosgrp {
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fsl,pins = <
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MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x0b0b0
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MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x0b0b0
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MX6ULL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x0b0b0
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MX6ULL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x0b0b0
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MX6ULL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x0b0b0
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MX6ULL_PAD_SNVS_TAMPER6__GPIO5_IO06 0x0b0b0
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MX6ULL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x0b0b0
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MX6ULL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x0b0b0
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>;
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};
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pinctrl_usbotg2_vbus: usbotg2vbusgrp {
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fsl,pins = <
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MX6ULL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x1b0b0
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>;
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};
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pinctrl_w1: w1grp {
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fsl,pins = <
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MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x0b0b0
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>;
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};
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};
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