101 lines
1.9 KiB
YAML
101 lines
1.9 KiB
YAML
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/usb/ti,keystone-dwc3.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: TI Keystone Soc USB Controller
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maintainers:
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- Roger Quadros <rogerq@kernel.org>
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properties:
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compatible:
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items:
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- enum:
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- ti,keystone-dwc3
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- ti,am654-dwc3
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reg:
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maxItems: 1
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'#address-cells':
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const: 1
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'#size-cells':
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const: 1
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ranges: true
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interrupts:
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maxItems: 1
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clocks:
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minItems: 1
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maxItems: 2
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assigned-clocks:
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minItems: 1
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maxItems: 2
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assigned-clock-parents:
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minItems: 1
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maxItems: 2
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power-domains:
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maxItems: 1
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description: Should contain a phandle to a PM domain provider node
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and an args specifier containing the USB device id
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value. This property is as per the binding,
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Documentation/devicetree/bindings/soc/ti/sci-pm-domain.yaml
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phys:
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maxItems: 1
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description:
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PHY specifier for the USB3.0 PHY. Some SoCs need the USB3.0 PHY
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to be turned on before the controller.
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Documentation/devicetree/bindings/phy/phy-bindings.txt
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phy-names:
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items:
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- const: usb3-phy
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dma-coherent: true
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dma-ranges: true
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patternProperties:
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"usb@[a-f0-9]+$":
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$ref: snps,dwc3.yaml#
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required:
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- compatible
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- reg
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- "#address-cells"
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- "#size-cells"
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- ranges
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- interrupts
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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dwc3@2680000 {
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compatible = "ti,keystone-dwc3";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x2680000 0x10000>;
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clocks = <&clkusb>;
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interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
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ranges;
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usb@2690000 {
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compatible = "snps,dwc3";
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reg = <0x2690000 0x70000>;
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interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
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usb-phy = <&usb_phy>, <&usb_phy>;
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};
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};
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