35 lines
737 B
Plaintext
35 lines
737 B
Plaintext
|
J-Core SPI master
|
||
|
|
|
||
|
|
Required properties:
|
||
|
|
|
||
|
|
- compatible: Must be "jcore,spi2".
|
||
|
|
|
||
|
|
- reg: Memory region for registers.
|
||
|
|
|
||
|
|
- #address-cells: Must be 1.
|
||
|
|
|
||
|
|
- #size-cells: Must be 0.
|
||
|
|
|
||
|
|
Optional properties:
|
||
|
|
|
||
|
|
- clocks: If a phandle named "ref_clk" is present, SPI clock speed
|
||
|
|
programming is relative to the frequency of the indicated clock.
|
||
|
|
Necessary only if the input clock rate is something other than a
|
||
|
|
fixed 50 MHz.
|
||
|
|
|
||
|
|
- clock-names: Clock names, one for each phandle in clocks.
|
||
|
|
|
||
|
|
See spi-bus.txt for additional properties not specific to this device.
|
||
|
|
|
||
|
|
Example:
|
||
|
|
|
||
|
|
spi@40 {
|
||
|
|
compatible = "jcore,spi2";
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
reg = <0x40 0x8>;
|
||
|
|
spi-max-frequency = <25000000>;
|
||
|
|
clocks = <&bus_clk>;
|
||
|
|
clock-names = "ref_clk";
|
||
|
|
}
|