92 lines
2.2 KiB
YAML
92 lines
2.2 KiB
YAML
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/soc/mediatek/mtk-svs.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: MediaTek Smart Voltage Scaling (SVS) Device Tree Bindings
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maintainers:
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- Roger Lu <roger.lu@mediatek.com>
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- Matthias Brugger <matthias.bgg@gmail.com>
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- Kevin Hilman <khilman@kernel.org>
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description: |+
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The SVS engine is a piece of hardware which has several
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controllers(banks) for calculating suitable voltage to
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different power domains(CPU/GPU/CCI) according to
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chip process corner, temperatures and other factors. Then DVFS
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driver could apply SVS bank voltage to PMIC/Buck.
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properties:
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compatible:
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enum:
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- mediatek,mt8183-svs
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- mediatek,mt8192-svs
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reg:
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maxItems: 1
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description: Address range of the MTK SVS controller.
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interrupts:
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maxItems: 1
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clocks:
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maxItems: 1
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description: Main clock for MTK SVS controller to work.
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clock-names:
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const: main
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nvmem-cells:
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minItems: 1
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description:
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Phandle to the calibration data provided by a nvmem device.
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items:
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- description: SVS efuse for SVS controller
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- description: Thermal efuse for SVS controller
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nvmem-cell-names:
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items:
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- const: svs-calibration-data
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- const: t-calibration-data
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resets:
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maxItems: 1
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reset-names:
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items:
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- const: svs_rst
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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- nvmem-cells
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- nvmem-cell-names
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/mt8183-clk.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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svs@1100b000 {
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compatible = "mediatek,mt8183-svs";
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reg = <0 0x1100b000 0 0x1000>;
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interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_LOW>;
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clocks = <&infracfg CLK_INFRA_THERM>;
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clock-names = "main";
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nvmem-cells = <&svs_calibration>, <&thermal_calibration>;
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nvmem-cell-names = "svs-calibration-data", "t-calibration-data";
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};
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};
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