87 lines
2.9 KiB
YAML
87 lines
2.9 KiB
YAML
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# SPDX-License-Identifier: GPL-2.0-or-later
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pinctrl/aspeed,ast2400-pinctrl.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: ASPEED AST2400 Pin Controller
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maintainers:
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- Andrew Jeffery <andrew@aj.id.au>
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description: |+
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The pin controller node should be the child of a syscon node with the
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required property:
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- compatible: Should be one of the following:
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"aspeed,ast2400-scu", "syscon", "simple-mfd"
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Refer to the bindings described in
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Documentation/devicetree/bindings/mfd/syscon.yaml
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properties:
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compatible:
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const: aspeed,ast2400-pinctrl
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reg:
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maxItems: 2
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patternProperties:
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'^.*$':
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if:
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type: object
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then:
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patternProperties:
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"^function|groups$":
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$ref: "/schemas/types.yaml#/definitions/string"
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enum: [ ACPI, ADC0, ADC1, ADC10, ADC11, ADC12, ADC13, ADC14, ADC15,
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ADC2, ADC3, ADC4, ADC5, ADC6, ADC7, ADC8, ADC9, BMCINT, DDCCLK, DDCDAT,
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EXTRST, FLACK, FLBUSY, FLWP, GPID, GPID0, GPID2, GPID4, GPID6, GPIE0,
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GPIE2, GPIE4, GPIE6, I2C10, I2C11, I2C12, I2C13, I2C14, I2C3, I2C4,
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I2C5, I2C6, I2C7, I2C8, I2C9, LPCPD, LPCPME, LPCRST, LPCSMI, MAC1LINK,
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MAC2LINK, MDIO1, MDIO2, NCTS1, NCTS2, NCTS3, NCTS4, NDCD1, NDCD2,
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NDCD3, NDCD4, NDSR1, NDSR2, NDSR3, NDSR4, NDTR1, NDTR2, NDTR3, NDTR4,
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NDTS4, NRI1, NRI2, NRI3, NRI4, NRTS1, NRTS2, NRTS3, OSCCLK, PWM0,
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PWM1, PWM2, PWM3, PWM4, PWM5, PWM6, PWM7, RGMII1, RGMII2, RMII1,
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RMII2, ROM16, ROM8, ROMCS1, ROMCS2, ROMCS3, ROMCS4, RXD1, RXD2, RXD3,
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RXD4, SALT1, SALT2, SALT3, SALT4, SD1, SD2, SGPMCK, SGPMI, SGPMLD,
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SGPMO, SGPSCK, SGPSI0, SGPSI1, SGPSLD, SIOONCTRL, SIOPBI, SIOPBO,
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SIOPWREQ, SIOPWRGD, SIOS3, SIOS5, SIOSCI, SPI1, SPI1DEBUG, SPI1PASSTHRU,
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SPICS1, TIMER3, TIMER4, TIMER5, TIMER6, TIMER7, TIMER8, TXD1, TXD2,
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TXD3, TXD4, UART6, USB11D1, USB11H2, USB2D1, USB2H1, USBCKI, VGABIOS_ROM,
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VGAHS, VGAVS, VPI18, VPI24, VPI30, VPO12, VPO24, WDTRST1, WDTRST2]
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allOf:
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- $ref: "pinctrl.yaml#"
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required:
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- compatible
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additionalProperties: false
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examples:
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- |
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syscon: scu@1e6e2000 {
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compatible = "aspeed,ast2400-scu", "syscon", "simple-mfd";
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reg = <0x1e6e2000 0x1a8>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x1e6e2000 0x1000>;
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pinctrl: pinctrl {
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compatible = "aspeed,ast2400-pinctrl";
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pinctrl_i2c3_default: i2c3_default {
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function = "I2C3";
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groups = "I2C3";
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};
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pinctrl_gpioh0_unbiased_default: gpioh0 {
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pins = "A8";
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bias-disable;
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};
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};
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};
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