58 lines
2.0 KiB
Plaintext
58 lines
2.0 KiB
Plaintext
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Micrel PHY properties.
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These properties cover the base properties Micrel PHYs.
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Optional properties:
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- micrel,led-mode : LED mode value to set for PHYs with configurable LEDs.
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Configure the LED mode with single value. The list of PHYs and the
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bits that are currently supported:
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KSZ8001: register 0x1e, bits 15..14
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KSZ8041: register 0x1e, bits 15..14
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KSZ8021: register 0x1f, bits 5..4
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KSZ8031: register 0x1f, bits 5..4
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KSZ8051: register 0x1f, bits 5..4
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KSZ8081: register 0x1f, bits 5..4
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KSZ8091: register 0x1f, bits 5..4
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LAN8814: register EP5.0, bit 6
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See the respective PHY datasheet for the mode values.
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- micrel,rmii-reference-clock-select-25-mhz: RMII Reference Clock Select
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bit selects 25 MHz mode
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Setting the RMII Reference Clock Select bit enables 25 MHz rather
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than 50 MHz clock mode.
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Note that this option in only needed for certain PHY revisions with a
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non-standard, inverted function of this configuration bit.
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Specifically, a clock reference ("rmii-ref" below) is always needed to
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actually select a mode.
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- clocks, clock-names: contains clocks according to the common clock bindings.
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supported clocks:
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- KSZ8021, KSZ8031, KSZ8081, KSZ8091: "rmii-ref": The RMII reference
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input clock. Used to determine the XI input clock.
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- micrel,fiber-mode: If present the PHY is configured to operate in fiber mode
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Some PHYs, such as the KSZ8041FTL variant, support fiber mode, enabled
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by the FXEN boot strapping pin. It can't be determined from the PHY
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registers whether the PHY is in fiber mode, so this boolean device tree
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property can be used to describe it.
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In fiber mode, auto-negotiation is disabled and the PHY can only work in
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100base-fx (full and half duplex) modes.
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- coma-mode-gpios: If present the given gpio will be deasserted when the
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PHY is probed.
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Some PHYs have a COMA mode input pin which puts the PHY into
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isolate and power-down mode. On some boards this input is connected
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to a GPIO of the SoC.
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Supported on the LAN8814.
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