43 lines
1.1 KiB
Plaintext
43 lines
1.1 KiB
Plaintext
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Imagination Pistachio SoC
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=========================
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Required properties:
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--------------------
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- compatible: Must include "img,pistachio".
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CPU nodes:
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----------
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A "cpus" node is required. Required properties:
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- #address-cells: Must be 1.
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- #size-cells: Must be 0.
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A CPU sub-node is also required for at least CPU 0. Since the topology may
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be probed via CPS, it is not necessary to specify secondary CPUs. Required
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propertis:
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- device_type: Must be "cpu".
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- compatible: Must be "mti,interaptiv".
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- reg: CPU number.
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- clocks: Must include the CPU clock. See ../../clock/clock-bindings.txt for
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details on clock bindings.
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Example:
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu0: cpu@0 {
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device_type = "cpu";
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compatible = "mti,interaptiv";
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reg = <0>;
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clocks = <&clk_core CLK_MIPS>;
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};
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};
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Boot protocol:
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--------------
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In accordance with the MIPS UHI specification[1], the bootloader must pass the
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following arguments to the kernel:
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- $a0: -2.
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- $a1: KSEG0 address of the flattened device-tree blob.
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[1] http://prplfoundation.org/wiki/MIPS_documentation
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