219 lines
6.7 KiB
YAML
219 lines
6.7 KiB
YAML
|
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||
|
%YAML 1.2
|
||
|
---
|
||
|
$id: http://devicetree.org/schemas/iommu/mediatek,iommu.yaml#
|
||
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||
|
|
||
|
title: MediaTek IOMMU Architecture Implementation
|
||
|
|
||
|
maintainers:
|
||
|
- Yong Wu <yong.wu@mediatek.com>
|
||
|
|
||
|
description: |+
|
||
|
Some MediaTek SOCs contain a Multimedia Memory Management Unit (M4U), and
|
||
|
this M4U have two generations of HW architecture. Generation one uses flat
|
||
|
pagetable, and only supports 4K size page mapping. Generation two uses the
|
||
|
ARM Short-Descriptor translation table format for address translation.
|
||
|
|
||
|
About the M4U Hardware Block Diagram, please check below:
|
||
|
|
||
|
EMI (External Memory Interface)
|
||
|
|
|
||
|
m4u (Multimedia Memory Management Unit)
|
||
|
|
|
||
|
+--------+
|
||
|
| |
|
||
|
gals0-rx gals1-rx (Global Async Local Sync rx)
|
||
|
| |
|
||
|
| |
|
||
|
gals0-tx gals1-tx (Global Async Local Sync tx)
|
||
|
| | Some SoCs may have GALS.
|
||
|
+--------+
|
||
|
|
|
||
|
SMI Common(Smart Multimedia Interface Common)
|
||
|
|
|
||
|
+----------------+-------
|
||
|
| |
|
||
|
| gals-rx There may be GALS in some larbs.
|
||
|
| |
|
||
|
| |
|
||
|
| gals-tx
|
||
|
| |
|
||
|
SMI larb0 SMI larb1 ... SoCs have several SMI local arbiter(larb).
|
||
|
(display) (vdec)
|
||
|
| |
|
||
|
| |
|
||
|
+-----+-----+ +----+----+
|
||
|
| | | | | |
|
||
|
| | |... | | | ... There are different ports in each larb.
|
||
|
| | | | | |
|
||
|
OVL0 RDMA0 WDMA0 MC PP VLD
|
||
|
|
||
|
As above, The Multimedia HW will go through SMI and M4U while it
|
||
|
access EMI. SMI is a bridge between m4u and the Multimedia HW. It contain
|
||
|
smi local arbiter and smi common. It will control whether the Multimedia
|
||
|
HW should go though the m4u for translation or bypass it and talk
|
||
|
directly with EMI. And also SMI help control the power domain and clocks for
|
||
|
each local arbiter.
|
||
|
|
||
|
Normally we specify a local arbiter(larb) for each multimedia HW
|
||
|
like display, video decode, and camera. And there are different ports
|
||
|
in each larb. Take a example, There are many ports like MC, PP, VLD in the
|
||
|
video decode local arbiter, all these ports are according to the video HW.
|
||
|
|
||
|
In some SoCs, there may be a GALS(Global Async Local Sync) module between
|
||
|
smi-common and m4u, and additional GALS module between smi-larb and
|
||
|
smi-common. GALS can been seen as a "asynchronous fifo" which could help
|
||
|
synchronize for the modules in different clock frequency.
|
||
|
|
||
|
properties:
|
||
|
compatible:
|
||
|
oneOf:
|
||
|
- enum:
|
||
|
- mediatek,mt2701-m4u # generation one
|
||
|
- mediatek,mt2712-m4u # generation two
|
||
|
- mediatek,mt6779-m4u # generation two
|
||
|
- mediatek,mt6795-m4u # generation two
|
||
|
- mediatek,mt8167-m4u # generation two
|
||
|
- mediatek,mt8173-m4u # generation two
|
||
|
- mediatek,mt8183-m4u # generation two
|
||
|
- mediatek,mt8186-iommu-mm # generation two
|
||
|
- mediatek,mt8192-m4u # generation two
|
||
|
- mediatek,mt8195-iommu-vdo # generation two
|
||
|
- mediatek,mt8195-iommu-vpp # generation two
|
||
|
- mediatek,mt8195-iommu-infra # generation two
|
||
|
|
||
|
- description: mt7623 generation one
|
||
|
items:
|
||
|
- const: mediatek,mt7623-m4u
|
||
|
- const: mediatek,mt2701-m4u
|
||
|
|
||
|
reg:
|
||
|
maxItems: 1
|
||
|
|
||
|
interrupts:
|
||
|
maxItems: 1
|
||
|
|
||
|
clocks:
|
||
|
items:
|
||
|
- description: bclk is the block clock.
|
||
|
|
||
|
clock-names:
|
||
|
items:
|
||
|
- const: bclk
|
||
|
|
||
|
mediatek,infracfg:
|
||
|
$ref: /schemas/types.yaml#/definitions/phandle
|
||
|
description: The phandle to the mediatek infracfg syscon
|
||
|
|
||
|
mediatek,larbs:
|
||
|
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||
|
minItems: 1
|
||
|
maxItems: 32
|
||
|
items:
|
||
|
maxItems: 1
|
||
|
description: |
|
||
|
List of phandle to the local arbiters in the current Socs.
|
||
|
Refer to bindings/memory-controllers/mediatek,smi-larb.yaml. It must sort
|
||
|
according to the local arbiter index, like larb0, larb1, larb2...
|
||
|
|
||
|
'#iommu-cells':
|
||
|
const: 1
|
||
|
description: |
|
||
|
This is the mtk_m4u_id according to the HW. Specifies the mtk_m4u_id as
|
||
|
defined in
|
||
|
dt-binding/memory/mt2701-larb-port.h for mt2701 and mt7623,
|
||
|
dt-binding/memory/mt2712-larb-port.h for mt2712,
|
||
|
dt-binding/memory/mt6779-larb-port.h for mt6779,
|
||
|
dt-binding/memory/mt6795-larb-port.h for mt6795,
|
||
|
dt-binding/memory/mt8167-larb-port.h for mt8167,
|
||
|
dt-binding/memory/mt8173-larb-port.h for mt8173,
|
||
|
dt-binding/memory/mt8183-larb-port.h for mt8183,
|
||
|
dt-binding/memory/mt8186-memory-port.h for mt8186,
|
||
|
dt-binding/memory/mt8192-larb-port.h for mt8192.
|
||
|
dt-binding/memory/mt8195-memory-port.h for mt8195.
|
||
|
|
||
|
power-domains:
|
||
|
maxItems: 1
|
||
|
|
||
|
required:
|
||
|
- compatible
|
||
|
- reg
|
||
|
- interrupts
|
||
|
- '#iommu-cells'
|
||
|
|
||
|
allOf:
|
||
|
- if:
|
||
|
properties:
|
||
|
compatible:
|
||
|
contains:
|
||
|
enum:
|
||
|
- mediatek,mt2701-m4u
|
||
|
- mediatek,mt2712-m4u
|
||
|
- mediatek,mt6795-m4u
|
||
|
- mediatek,mt8173-m4u
|
||
|
- mediatek,mt8186-iommu-mm
|
||
|
- mediatek,mt8192-m4u
|
||
|
- mediatek,mt8195-iommu-vdo
|
||
|
- mediatek,mt8195-iommu-vpp
|
||
|
|
||
|
then:
|
||
|
required:
|
||
|
- clocks
|
||
|
|
||
|
- if:
|
||
|
properties:
|
||
|
compatible:
|
||
|
enum:
|
||
|
- mediatek,mt8186-iommu-mm
|
||
|
- mediatek,mt8192-m4u
|
||
|
- mediatek,mt8195-iommu-vdo
|
||
|
- mediatek,mt8195-iommu-vpp
|
||
|
|
||
|
then:
|
||
|
required:
|
||
|
- power-domains
|
||
|
|
||
|
- if:
|
||
|
properties:
|
||
|
compatible:
|
||
|
contains:
|
||
|
enum:
|
||
|
- mediatek,mt2712-m4u
|
||
|
- mediatek,mt6795-m4u
|
||
|
- mediatek,mt8173-m4u
|
||
|
|
||
|
then:
|
||
|
required:
|
||
|
- mediatek,infracfg
|
||
|
|
||
|
- if: # The IOMMUs don't have larbs.
|
||
|
not:
|
||
|
properties:
|
||
|
compatible:
|
||
|
contains:
|
||
|
const: mediatek,mt8195-iommu-infra
|
||
|
|
||
|
then:
|
||
|
required:
|
||
|
- mediatek,larbs
|
||
|
|
||
|
additionalProperties: false
|
||
|
|
||
|
examples:
|
||
|
- |
|
||
|
#include <dt-bindings/clock/mt8173-clk.h>
|
||
|
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||
|
|
||
|
iommu: iommu@10205000 {
|
||
|
compatible = "mediatek,mt8173-m4u";
|
||
|
reg = <0x10205000 0x1000>;
|
||
|
interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_LOW>;
|
||
|
clocks = <&infracfg CLK_INFRA_M4U>;
|
||
|
clock-names = "bclk";
|
||
|
mediatek,infracfg = <&infracfg>;
|
||
|
mediatek,larbs = <&larb0>, <&larb1>, <&larb2>,
|
||
|
<&larb3>, <&larb4>, <&larb5>;
|
||
|
#iommu-cells = <1>;
|
||
|
};
|