67 lines
1.4 KiB
YAML
67 lines
1.4 KiB
YAML
|
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||
|
|
%YAML 1.2
|
||
|
|
---
|
||
|
|
$id: "http://devicetree.org/schemas/i2c/apple,i2c.yaml#"
|
||
|
|
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
||
|
|
|
||
|
|
title: Apple/PASemi I2C controller
|
||
|
|
|
||
|
|
maintainers:
|
||
|
|
- Sven Peter <sven@svenpeter.dev>
|
||
|
|
|
||
|
|
description: |
|
||
|
|
Apple SoCs such as the M1 come with a I2C controller based on the one found
|
||
|
|
in machines with P. A. Semi's PWRficient processors.
|
||
|
|
The bus is used to communicate with e.g. USB PD chips or the speaker
|
||
|
|
amp.
|
||
|
|
|
||
|
|
allOf:
|
||
|
|
- $ref: /schemas/i2c/i2c-controller.yaml#
|
||
|
|
|
||
|
|
properties:
|
||
|
|
compatible:
|
||
|
|
items:
|
||
|
|
- enum:
|
||
|
|
- apple,t8103-i2c
|
||
|
|
- apple,t6000-i2c
|
||
|
|
- const: apple,i2c
|
||
|
|
|
||
|
|
reg:
|
||
|
|
maxItems: 1
|
||
|
|
|
||
|
|
clocks:
|
||
|
|
items:
|
||
|
|
- description: I2C bus reference clock
|
||
|
|
|
||
|
|
interrupts:
|
||
|
|
maxItems: 1
|
||
|
|
|
||
|
|
clock-frequency:
|
||
|
|
description: |
|
||
|
|
Desired I2C bus clock frequency in Hz. If not specified, 100 kHz will be
|
||
|
|
used. This frequency is generated by dividing the reference clock.
|
||
|
|
Allowed values are between ref_clk/(16*4) and ref_clk/(16*255).
|
||
|
|
|
||
|
|
power-domains:
|
||
|
|
maxItems: 1
|
||
|
|
|
||
|
|
required:
|
||
|
|
- compatible
|
||
|
|
- reg
|
||
|
|
- clocks
|
||
|
|
- interrupts
|
||
|
|
|
||
|
|
unevaluatedProperties: false
|
||
|
|
|
||
|
|
examples:
|
||
|
|
- |
|
||
|
|
i2c@35010000 {
|
||
|
|
compatible = "apple,t8103-i2c", "apple,i2c";
|
||
|
|
reg = <0x35010000 0x4000>;
|
||
|
|
interrupt-parent = <&aic>;
|
||
|
|
interrupts = <0 627 4>;
|
||
|
|
clocks = <&ref_clk>;
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <0>;
|
||
|
|
};
|