59 lines
1.2 KiB
YAML
59 lines
1.2 KiB
YAML
|
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||
|
|
%YAML 1.2
|
||
|
|
---
|
||
|
|
$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-tvo.yaml#
|
||
|
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||
|
|
|
||
|
|
title: NVIDIA Tegra TV Encoder Output
|
||
|
|
|
||
|
|
maintainers:
|
||
|
|
- Thierry Reding <thierry.reding@gmail.com>
|
||
|
|
- Jon Hunter <jonathanh@nvidia.com>
|
||
|
|
|
||
|
|
properties:
|
||
|
|
$nodename:
|
||
|
|
pattern: "^tvo@[0-9a-f]+$"
|
||
|
|
|
||
|
|
compatible:
|
||
|
|
enum:
|
||
|
|
- nvidia,tegra20-tvo
|
||
|
|
- nvidia,tegra30-tvo
|
||
|
|
- nvidia,tegra114-tvo
|
||
|
|
|
||
|
|
reg:
|
||
|
|
maxItems: 1
|
||
|
|
|
||
|
|
interrupts:
|
||
|
|
maxItems: 1
|
||
|
|
|
||
|
|
clocks:
|
||
|
|
items:
|
||
|
|
- description: module clock
|
||
|
|
|
||
|
|
operating-points-v2:
|
||
|
|
$ref: "/schemas/types.yaml#/definitions/phandle"
|
||
|
|
|
||
|
|
power-domains:
|
||
|
|
items:
|
||
|
|
- description: phandle to the core power domain
|
||
|
|
|
||
|
|
additionalProperties: false
|
||
|
|
|
||
|
|
required:
|
||
|
|
- compatible
|
||
|
|
- reg
|
||
|
|
- interrupts
|
||
|
|
- clocks
|
||
|
|
|
||
|
|
examples:
|
||
|
|
- |
|
||
|
|
#include <dt-bindings/clock/tegra20-car.h>
|
||
|
|
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||
|
|
|
||
|
|
tvo@542c0000 {
|
||
|
|
compatible = "nvidia,tegra20-tvo";
|
||
|
|
reg = <0x542c0000 0x00040000>;
|
||
|
|
interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
|
||
|
|
clocks = <&tegra_car TEGRA20_CLK_TVO>;
|
||
|
|
};
|