123 lines
2.8 KiB
YAML
123 lines
2.8 KiB
YAML
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# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/rockchip/rockchip,rk3066-hdmi.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Rockchip rk3066 HDMI controller
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maintainers:
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- Sandy Huang <hjc@rock-chips.com>
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- Heiko Stuebner <heiko@sntech.de>
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properties:
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compatible:
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const: rockchip,rk3066-hdmi
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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maxItems: 1
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clock-names:
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const: hclk
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power-domains:
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maxItems: 1
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rockchip,grf:
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$ref: /schemas/types.yaml#/definitions/phandle
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description:
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This soc uses GRF regs to switch the HDMI TX input between vop0 and vop1.
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ports:
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$ref: /schemas/graph.yaml#/properties/ports
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properties:
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port@0:
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$ref: /schemas/graph.yaml#/properties/port
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description:
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Port node with two endpoints, numbered 0 and 1,
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connected respectively to vop0 and vop1.
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port@1:
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$ref: /schemas/graph.yaml#/properties/port
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description:
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Port node with one endpoint connected to a hdmi-connector node.
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required:
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- port@0
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- port@1
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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- pinctrl-0
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- pinctrl-names
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- power-domains
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- rockchip,grf
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- ports
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/rk3066a-cru.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/pinctrl/rockchip.h>
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#include <dt-bindings/power/rk3066-power.h>
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hdmi: hdmi@10116000 {
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compatible = "rockchip,rk3066-hdmi";
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reg = <0x10116000 0x2000>;
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interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru HCLK_HDMI>;
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clock-names = "hclk";
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pinctrl-0 = <&hdmii2c_xfer>, <&hdmi_hpd>;
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pinctrl-names = "default";
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power-domains = <&power RK3066_PD_VIO>;
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rockchip,grf = <&grf>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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hdmi_in: port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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hdmi_in_vop0: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&vop0_out_hdmi>;
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};
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hdmi_in_vop1: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&vop1_out_hdmi>;
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};
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};
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hdmi_out: port@1 {
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reg = <1>;
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hdmi_out_con: endpoint {
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remote-endpoint = <&hdmi_con_in>;
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};
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};
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};
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};
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pinctrl {
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hdmi {
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hdmi_hpd: hdmi-hpd {
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rockchip,pins = <0 RK_PA0 1 &pcfg_pull_default>;
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};
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hdmii2c_xfer: hdmii2c-xfer {
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rockchip,pins = <0 RK_PA1 1 &pcfg_pull_none>,
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<0 RK_PA2 1 &pcfg_pull_none>;
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};
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};
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};
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