104 lines
3.1 KiB
YAML
104 lines
3.1 KiB
YAML
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# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/allwinner,sun8i-h3-bus-gates-clk.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Allwinner A10 Bus Gates Clock
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maintainers:
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- Chen-Yu Tsai <wens@csie.org>
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- Maxime Ripard <mripard@kernel.org>
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deprecated: true
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properties:
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"#clock-cells":
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const: 1
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description: >
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This additional argument passed to that clock is the offset of
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the bit controlling this particular gate in the register.
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compatible:
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const: allwinner,sun8i-h3-bus-gates-clk
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reg:
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maxItems: 1
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clocks:
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maxItems: 4
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clock-names:
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maxItems: 4
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description: >
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The parent order must match the hardware programming order.
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clock-indices:
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minItems: 1
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maxItems: 64
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clock-output-names:
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minItems: 1
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maxItems: 64
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required:
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- "#clock-cells"
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- compatible
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- reg
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- clocks
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- clock-indices
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- clock-names
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- clock-output-names
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additionalProperties: false
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examples:
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- |
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clk@1c20060 {
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#clock-cells = <1>;
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compatible = "allwinner,sun8i-h3-bus-gates-clk";
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reg = <0x01c20060 0x14>;
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clocks = <&ahb1>, <&ahb2>, <&apb1>, <&apb2>;
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clock-names = "ahb1", "ahb2", "apb1", "apb2";
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clock-indices = <5>, <6>, <8>,
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<9>, <10>, <13>,
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<14>, <17>, <18>,
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<19>, <20>,
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<21>, <23>,
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<24>, <25>,
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<26>, <27>,
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<28>, <29>,
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<30>, <31>, <32>,
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<35>, <36>, <37>,
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<40>, <41>, <43>,
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<44>, <52>, <53>,
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<54>, <64>,
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<65>, <69>, <72>,
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<76>, <77>, <78>,
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<96>, <97>, <98>,
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<112>, <113>,
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<114>, <115>,
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<116>, <128>, <135>;
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clock-output-names = "bus_ce", "bus_dma", "bus_mmc0",
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"bus_mmc1", "bus_mmc2", "bus_nand",
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"bus_sdram", "bus_gmac", "bus_ts",
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"bus_hstimer", "bus_spi0",
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"bus_spi1", "bus_otg",
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"bus_otg_ehci0", "bus_ehci1",
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"bus_ehci2", "bus_ehci3",
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"bus_otg_ohci0", "bus_ohci1",
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"bus_ohci2", "bus_ohci3", "bus_ve",
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"bus_lcd0", "bus_lcd1", "bus_deint",
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"bus_csi", "bus_tve", "bus_hdmi",
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"bus_de", "bus_gpu", "bus_msgbox",
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"bus_spinlock", "bus_codec",
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"bus_spdif", "bus_pio", "bus_ths",
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"bus_i2s0", "bus_i2s1", "bus_i2s2",
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"bus_i2c0", "bus_i2c1", "bus_i2c2",
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"bus_uart0", "bus_uart1",
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"bus_uart2", "bus_uart3",
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"bus_scr", "bus_ephy", "bus_dbg";
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};
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...
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