54 lines
985 B
YAML
54 lines
985 B
YAML
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# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-pll5-clk.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Allwinner A10 DRAM PLL
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maintainers:
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- Chen-Yu Tsai <wens@csie.org>
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- Maxime Ripard <mripard@kernel.org>
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deprecated: true
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properties:
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"#clock-cells":
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const: 1
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description: >
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The first output is the DRAM clock output, the second is meant
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for peripherals on the SoC.
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compatible:
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const: allwinner,sun4i-a10-pll5-clk
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reg:
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maxItems: 1
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clocks:
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maxItems: 1
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clock-output-names:
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maxItems: 2
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required:
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- "#clock-cells"
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- compatible
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- reg
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- clocks
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- clock-output-names
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additionalProperties: false
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examples:
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- |
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clk@1c20020 {
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#clock-cells = <1>;
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compatible = "allwinner,sun4i-a10-pll5-clk";
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reg = <0x01c20020 0x4>;
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clocks = <&osc24M>;
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clock-output-names = "pll5_ddr", "pll5_other";
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};
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...
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