153 lines
4.9 KiB
YAML
153 lines
4.9 KiB
YAML
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# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-gates-clk.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Allwinner A10 Bus Gates Clock
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maintainers:
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- Chen-Yu Tsai <wens@csie.org>
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- Maxime Ripard <mripard@kernel.org>
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deprecated: true
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properties:
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"#clock-cells":
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const: 1
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description: >
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This additional argument passed to that clock is the offset of
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the bit controlling this particular gate in the register.
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compatible:
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oneOf:
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- const: allwinner,sun4i-a10-gates-clk
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- const: allwinner,sun4i-a10-axi-gates-clk
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- const: allwinner,sun4i-a10-ahb-gates-clk
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- const: allwinner,sun5i-a10s-ahb-gates-clk
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- const: allwinner,sun5i-a13-ahb-gates-clk
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- const: allwinner,sun7i-a20-ahb-gates-clk
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- const: allwinner,sun6i-a31-ahb1-gates-clk
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- const: allwinner,sun8i-a23-ahb1-gates-clk
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- const: allwinner,sun9i-a80-ahb0-gates-clk
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- const: allwinner,sun9i-a80-ahb1-gates-clk
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- const: allwinner,sun9i-a80-ahb2-gates-clk
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- const: allwinner,sun4i-a10-apb0-gates-clk
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- const: allwinner,sun5i-a10s-apb0-gates-clk
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- const: allwinner,sun5i-a13-apb0-gates-clk
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- const: allwinner,sun7i-a20-apb0-gates-clk
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- const: allwinner,sun9i-a80-apb0-gates-clk
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- const: allwinner,sun8i-a83t-apb0-gates-clk
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- const: allwinner,sun4i-a10-apb1-gates-clk
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- const: allwinner,sun5i-a13-apb1-gates-clk
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- const: allwinner,sun5i-a10s-apb1-gates-clk
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- const: allwinner,sun6i-a31-apb1-gates-clk
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- const: allwinner,sun7i-a20-apb1-gates-clk
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- const: allwinner,sun8i-a23-apb1-gates-clk
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- const: allwinner,sun9i-a80-apb1-gates-clk
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- const: allwinner,sun6i-a31-apb2-gates-clk
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- const: allwinner,sun8i-a23-apb2-gates-clk
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- const: allwinner,sun8i-a83t-bus-gates-clk
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- const: allwinner,sun9i-a80-apbs-gates-clk
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- const: allwinner,sun4i-a10-dram-gates-clk
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- items:
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- const: allwinner,sun5i-a13-dram-gates-clk
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- const: allwinner,sun4i-a10-gates-clk
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- items:
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- const: allwinner,sun8i-h3-apb0-gates-clk
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- const: allwinner,sun4i-a10-gates-clk
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reg:
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maxItems: 1
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clocks:
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maxItems: 1
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clock-indices:
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minItems: 1
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maxItems: 64
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clock-output-names:
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minItems: 1
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maxItems: 64
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required:
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- "#clock-cells"
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- compatible
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- reg
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- clocks
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- clock-indices
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- clock-output-names
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additionalProperties: false
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examples:
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- |
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clk@1c2005c {
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#clock-cells = <1>;
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compatible = "allwinner,sun4i-a10-axi-gates-clk";
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reg = <0x01c2005c 0x4>;
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clocks = <&axi>;
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clock-indices = <0>;
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clock-output-names = "axi_dram";
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};
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- |
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clk@1c20060 {
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#clock-cells = <1>;
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compatible = "allwinner,sun4i-a10-ahb-gates-clk";
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reg = <0x01c20060 0x8>;
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clocks = <&ahb>;
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clock-indices = <0>, <1>,
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<2>, <3>,
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<4>, <5>, <6>,
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<7>, <8>, <9>,
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<10>, <11>, <12>,
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<13>, <14>, <16>,
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<17>, <18>, <20>,
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<21>, <22>, <23>,
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<24>, <25>, <26>,
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<32>, <33>, <34>,
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<35>, <36>, <37>,
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<40>, <41>, <43>,
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<44>, <45>,
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<46>, <47>,
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<50>, <52>;
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clock-output-names = "ahb_usb0", "ahb_ehci0",
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"ahb_ohci0", "ahb_ehci1",
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"ahb_ohci1", "ahb_ss", "ahb_dma",
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"ahb_bist", "ahb_mmc0", "ahb_mmc1",
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"ahb_mmc2", "ahb_mmc3", "ahb_ms",
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"ahb_nand", "ahb_sdram", "ahb_ace",
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"ahb_emac", "ahb_ts", "ahb_spi0",
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"ahb_spi1", "ahb_spi2", "ahb_spi3",
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"ahb_pata", "ahb_sata", "ahb_gps",
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"ahb_ve", "ahb_tvd", "ahb_tve0",
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"ahb_tve1", "ahb_lcd0", "ahb_lcd1",
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"ahb_csi0", "ahb_csi1", "ahb_hdmi",
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"ahb_de_be0", "ahb_de_be1",
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"ahb_de_fe0", "ahb_de_fe1",
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"ahb_mp", "ahb_mali400";
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};
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- |
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clk@1c20068 {
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#clock-cells = <1>;
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compatible = "allwinner,sun4i-a10-apb0-gates-clk";
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reg = <0x01c20068 0x4>;
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clocks = <&apb0>;
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clock-indices = <0>, <1>,
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<2>, <3>,
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<5>, <6>,
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<7>, <10>;
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clock-output-names = "apb0_codec", "apb0_spdif",
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"apb0_ac97", "apb0_iis",
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"apb0_pio", "apb0_ir0",
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"apb0_ir1", "apb0_keypad";
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};
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...
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