26 lines
700 B
Plaintext
26 lines
700 B
Plaintext
|
MediaTek SGMIISYS controller
|
||
|
|
============================
|
||
|
|
|
||
|
|
The MediaTek SGMIISYS controller provides various clocks to the system.
|
||
|
|
|
||
|
|
Required Properties:
|
||
|
|
|
||
|
|
- compatible: Should be:
|
||
|
|
- "mediatek,mt7622-sgmiisys", "syscon"
|
||
|
|
- "mediatek,mt7629-sgmiisys", "syscon"
|
||
|
|
- "mediatek,mt7986-sgmiisys_0", "syscon"
|
||
|
|
- "mediatek,mt7986-sgmiisys_1", "syscon"
|
||
|
|
- #clock-cells: Must be 1
|
||
|
|
|
||
|
|
The SGMIISYS controller uses the common clk binding from
|
||
|
|
Documentation/devicetree/bindings/clock/clock-bindings.txt
|
||
|
|
The available clocks are defined in dt-bindings/clock/mt*-clk.h.
|
||
|
|
|
||
|
|
Example:
|
||
|
|
|
||
|
|
sgmiisys: sgmiisys@1b128000 {
|
||
|
|
compatible = "mediatek,mt7622-sgmiisys", "syscon";
|
||
|
|
reg = <0 0x1b128000 0 0x1000>;
|
||
|
|
#clock-cells = <1>;
|
||
|
|
};
|