82 lines
2.0 KiB
YAML
82 lines
2.0 KiB
YAML
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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/arm/arm,coresight-cpu-debug.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: CoreSight CPU Debug Component
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maintainers:
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- Mathieu Poirier <mathieu.poirier@linaro.org>
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- Mike Leach <mike.leach@linaro.org>
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- Leo Yan <leo.yan@linaro.org>
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- Suzuki K Poulose <suzuki.poulose@arm.com>
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description: |
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CoreSight CPU debug component are compliant with the ARMv8 architecture
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reference manual (ARM DDI 0487A.k) Chapter 'Part H: External debug'. The
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external debug module is mainly used for two modes: self-hosted debug and
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external debug, and it can be accessed from mmio region from Coresight and
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eventually the debug module connects with CPU for debugging. And the debug
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module provides sample-based profiling extension, which can be used to sample
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CPU program counter, secure state and exception level, etc; usually every CPU
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has one dedicated debug module to be connected.
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select:
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properties:
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compatible:
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contains:
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const: arm,coresight-cpu-debug
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required:
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- compatible
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allOf:
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- $ref: /schemas/arm/primecell.yaml#
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properties:
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compatible:
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items:
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- const: arm,coresight-cpu-debug
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- const: arm,primecell
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reg:
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maxItems: 1
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clocks:
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maxItems: 1
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clock-names:
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maxItems: 1
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cpu:
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description:
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A phandle to the cpu this debug component is bound to.
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$ref: /schemas/types.yaml#/definitions/phandle
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power-domains:
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maxItems: 1
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description:
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A phandle to the debug power domain if the debug logic has its own
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dedicated power domain. CPU idle states may also need to be separately
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constrained to keep CPU cores powered.
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required:
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- compatible
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- reg
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- clocks
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- clock-names
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- cpu
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unevaluatedProperties: false
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examples:
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- |
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debug@f6590000 {
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compatible = "arm,coresight-cpu-debug", "arm,primecell";
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reg = <0xf6590000 0x1000>;
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clocks = <&sys_ctrl 1>;
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clock-names = "apb_pclk";
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cpu = <&cpu0>;
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};
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...
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