127 lines
4.0 KiB
C
127 lines
4.0 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 OR MIT */
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/*
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* Copyright (C) 2021 Ahmad Fatoum, Pengutronix
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*/
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#ifndef __DT_BINDINGS_RESET_STARFIVE_JH7100_H__
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#define __DT_BINDINGS_RESET_STARFIVE_JH7100_H__
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#define JH7100_RSTN_DOM3AHB_BUS 0
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#define JH7100_RSTN_DOM7AHB_BUS 1
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#define JH7100_RST_U74 2
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#define JH7100_RSTN_U74_AXI 3
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#define JH7100_RSTN_SGDMA2P_AHB 4
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#define JH7100_RSTN_SGDMA2P_AXI 5
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#define JH7100_RSTN_DMA2PNOC_AXI 6
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#define JH7100_RSTN_DLA_AXI 7
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#define JH7100_RSTN_DLANOC_AXI 8
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#define JH7100_RSTN_DLA_APB 9
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#define JH7100_RST_VP6_DRESET 10
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#define JH7100_RST_VP6_BRESET 11
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#define JH7100_RSTN_VP6_AXI 12
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#define JH7100_RSTN_VDECBRG_MAIN 13
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#define JH7100_RSTN_VDEC_AXI 14
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#define JH7100_RSTN_VDEC_BCLK 15
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#define JH7100_RSTN_VDEC_CCLK 16
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#define JH7100_RSTN_VDEC_APB 17
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#define JH7100_RSTN_JPEG_AXI 18
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#define JH7100_RSTN_JPEG_CCLK 19
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#define JH7100_RSTN_JPEG_APB 20
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#define JH7100_RSTN_JPCGC300_MAIN 21
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#define JH7100_RSTN_GC300_2X 22
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#define JH7100_RSTN_GC300_AXI 23
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#define JH7100_RSTN_GC300_AHB 24
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#define JH7100_RSTN_VENC_AXI 25
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#define JH7100_RSTN_VENCBRG_MAIN 26
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#define JH7100_RSTN_VENC_BCLK 27
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#define JH7100_RSTN_VENC_CCLK 28
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#define JH7100_RSTN_VENC_APB 29
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#define JH7100_RSTN_DDRPHY_APB 30
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#define JH7100_RSTN_NOC_ROB 31
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#define JH7100_RSTN_NOC_COG 32
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#define JH7100_RSTN_HIFI4_AXI 33
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#define JH7100_RSTN_HIFI4NOC_AXI 34
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#define JH7100_RST_HIFI4_DRESET 35
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#define JH7100_RST_HIFI4_BRESET 36
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#define JH7100_RSTN_USB_AXI 37
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#define JH7100_RSTN_USBNOC_AXI 38
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#define JH7100_RSTN_SGDMA1P_AXI 39
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#define JH7100_RSTN_DMA1P_AXI 40
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#define JH7100_RSTN_X2C_AXI 41
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#define JH7100_RSTN_NNE_AHB 42
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#define JH7100_RSTN_NNE_AXI 43
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#define JH7100_RSTN_NNENOC_AXI 44
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#define JH7100_RSTN_DLASLV_AXI 45
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#define JH7100_RSTN_DSPX2C_AXI 46
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#define JH7100_RSTN_VIN_SRC 47
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#define JH7100_RSTN_ISPSLV_AXI 48
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#define JH7100_RSTN_VIN_AXI 49
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#define JH7100_RSTN_VINNOC_AXI 50
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#define JH7100_RSTN_ISP0_AXI 51
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#define JH7100_RSTN_ISP0NOC_AXI 52
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#define JH7100_RSTN_ISP1_AXI 53
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#define JH7100_RSTN_ISP1NOC_AXI 54
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#define JH7100_RSTN_VOUT_SRC 55
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#define JH7100_RSTN_DISP_AXI 56
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#define JH7100_RSTN_DISPNOC_AXI 57
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#define JH7100_RSTN_SDIO0_AHB 58
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#define JH7100_RSTN_SDIO1_AHB 59
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#define JH7100_RSTN_GMAC_AHB 60
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#define JH7100_RSTN_SPI2AHB_AHB 61
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#define JH7100_RSTN_SPI2AHB_CORE 62
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#define JH7100_RSTN_EZMASTER_AHB 63
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#define JH7100_RST_E24 64
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#define JH7100_RSTN_QSPI_AHB 65
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#define JH7100_RSTN_QSPI_CORE 66
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#define JH7100_RSTN_QSPI_APB 67
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#define JH7100_RSTN_SEC_AHB 68
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#define JH7100_RSTN_AES 69
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#define JH7100_RSTN_PKA 70
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#define JH7100_RSTN_SHA 71
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#define JH7100_RSTN_TRNG_APB 72
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#define JH7100_RSTN_OTP_APB 73
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#define JH7100_RSTN_UART0_APB 74
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#define JH7100_RSTN_UART0_CORE 75
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#define JH7100_RSTN_UART1_APB 76
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#define JH7100_RSTN_UART1_CORE 77
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#define JH7100_RSTN_SPI0_APB 78
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#define JH7100_RSTN_SPI0_CORE 79
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#define JH7100_RSTN_SPI1_APB 80
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#define JH7100_RSTN_SPI1_CORE 81
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#define JH7100_RSTN_I2C0_APB 82
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#define JH7100_RSTN_I2C0_CORE 83
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#define JH7100_RSTN_I2C1_APB 84
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#define JH7100_RSTN_I2C1_CORE 85
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#define JH7100_RSTN_GPIO_APB 86
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#define JH7100_RSTN_UART2_APB 87
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#define JH7100_RSTN_UART2_CORE 88
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#define JH7100_RSTN_UART3_APB 89
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#define JH7100_RSTN_UART3_CORE 90
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#define JH7100_RSTN_SPI2_APB 91
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#define JH7100_RSTN_SPI2_CORE 92
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#define JH7100_RSTN_SPI3_APB 93
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#define JH7100_RSTN_SPI3_CORE 94
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#define JH7100_RSTN_I2C2_APB 95
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#define JH7100_RSTN_I2C2_CORE 96
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#define JH7100_RSTN_I2C3_APB 97
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#define JH7100_RSTN_I2C3_CORE 98
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#define JH7100_RSTN_WDTIMER_APB 99
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#define JH7100_RSTN_WDT 100
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#define JH7100_RSTN_TIMER0 101
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#define JH7100_RSTN_TIMER1 102
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#define JH7100_RSTN_TIMER2 103
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#define JH7100_RSTN_TIMER3 104
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#define JH7100_RSTN_TIMER4 105
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#define JH7100_RSTN_TIMER5 106
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#define JH7100_RSTN_TIMER6 107
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#define JH7100_RSTN_VP6INTC_APB 108
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#define JH7100_RSTN_PWM_APB 109
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#define JH7100_RSTN_MSI_APB 110
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#define JH7100_RSTN_TEMP_APB 111
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#define JH7100_RSTN_TEMP_SENSE 112
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#define JH7100_RSTN_SYSERR_APB 113
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#define JH7100_RSTN_END 114
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#endif /* __DT_BINDINGS_RESET_STARFIVE_JH7100_H__ */
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