394 lines
9.3 KiB
C
394 lines
9.3 KiB
C
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Intel IFC VF NIC driver for virtio dataplane offloading
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*
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* Copyright (C) 2020 Intel Corporation.
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*
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* Author: Zhu Lingshan <lingshan.zhu@intel.com>
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*
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*/
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#include "ifcvf_base.h"
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u16 ifcvf_set_vq_vector(struct ifcvf_hw *hw, u16 qid, int vector)
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{
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struct virtio_pci_common_cfg __iomem *cfg = hw->common_cfg;
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vp_iowrite16(qid, &cfg->queue_select);
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vp_iowrite16(vector, &cfg->queue_msix_vector);
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return vp_ioread16(&cfg->queue_msix_vector);
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}
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u16 ifcvf_set_config_vector(struct ifcvf_hw *hw, int vector)
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{
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struct virtio_pci_common_cfg __iomem *cfg = hw->common_cfg;
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vp_iowrite16(vector, &cfg->msix_config);
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return vp_ioread16(&cfg->msix_config);
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}
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static void __iomem *get_cap_addr(struct ifcvf_hw *hw,
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struct virtio_pci_cap *cap)
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{
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u32 length, offset;
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u8 bar;
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length = le32_to_cpu(cap->length);
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offset = le32_to_cpu(cap->offset);
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bar = cap->bar;
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if (bar >= IFCVF_PCI_MAX_RESOURCE) {
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IFCVF_DBG(hw->pdev,
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"Invalid bar number %u to get capabilities\n", bar);
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return NULL;
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}
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if (offset + length > pci_resource_len(hw->pdev, bar)) {
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IFCVF_DBG(hw->pdev,
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"offset(%u) + len(%u) overflows bar%u's capability\n",
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offset, length, bar);
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return NULL;
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}
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return hw->base[bar] + offset;
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}
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static int ifcvf_read_config_range(struct pci_dev *dev,
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uint32_t *val, int size, int where)
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{
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int ret, i;
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for (i = 0; i < size; i += 4) {
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ret = pci_read_config_dword(dev, where + i, val + i / 4);
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if (ret < 0)
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return ret;
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}
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return 0;
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}
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int ifcvf_init_hw(struct ifcvf_hw *hw, struct pci_dev *pdev)
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{
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struct virtio_pci_cap cap;
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u16 notify_off;
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int ret;
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u8 pos;
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u32 i;
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ret = pci_read_config_byte(pdev, PCI_CAPABILITY_LIST, &pos);
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if (ret < 0) {
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IFCVF_ERR(pdev, "Failed to read PCI capability list\n");
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return -EIO;
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}
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hw->pdev = pdev;
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while (pos) {
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ret = ifcvf_read_config_range(pdev, (u32 *)&cap,
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sizeof(cap), pos);
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if (ret < 0) {
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IFCVF_ERR(pdev,
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"Failed to get PCI capability at %x\n", pos);
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break;
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}
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if (cap.cap_vndr != PCI_CAP_ID_VNDR)
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goto next;
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switch (cap.cfg_type) {
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case VIRTIO_PCI_CAP_COMMON_CFG:
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hw->common_cfg = get_cap_addr(hw, &cap);
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IFCVF_DBG(pdev, "hw->common_cfg = %p\n",
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hw->common_cfg);
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break;
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case VIRTIO_PCI_CAP_NOTIFY_CFG:
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pci_read_config_dword(pdev, pos + sizeof(cap),
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&hw->notify_off_multiplier);
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hw->notify_bar = cap.bar;
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hw->notify_base = get_cap_addr(hw, &cap);
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hw->notify_base_pa = pci_resource_start(pdev, cap.bar) +
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le32_to_cpu(cap.offset);
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IFCVF_DBG(pdev, "hw->notify_base = %p\n",
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hw->notify_base);
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break;
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case VIRTIO_PCI_CAP_ISR_CFG:
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hw->isr = get_cap_addr(hw, &cap);
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IFCVF_DBG(pdev, "hw->isr = %p\n", hw->isr);
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break;
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case VIRTIO_PCI_CAP_DEVICE_CFG:
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hw->dev_cfg = get_cap_addr(hw, &cap);
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hw->cap_dev_config_size = le32_to_cpu(cap.length);
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IFCVF_DBG(pdev, "hw->dev_cfg = %p\n", hw->dev_cfg);
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break;
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}
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next:
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pos = cap.cap_next;
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}
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if (hw->common_cfg == NULL || hw->notify_base == NULL ||
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hw->isr == NULL || hw->dev_cfg == NULL) {
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IFCVF_ERR(pdev, "Incomplete PCI capabilities\n");
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return -EIO;
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}
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hw->nr_vring = vp_ioread16(&hw->common_cfg->num_queues);
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for (i = 0; i < hw->nr_vring; i++) {
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vp_iowrite16(i, &hw->common_cfg->queue_select);
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notify_off = vp_ioread16(&hw->common_cfg->queue_notify_off);
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hw->vring[i].notify_addr = hw->notify_base +
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notify_off * hw->notify_off_multiplier;
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hw->vring[i].notify_pa = hw->notify_base_pa +
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notify_off * hw->notify_off_multiplier;
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hw->vring[i].irq = -EINVAL;
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}
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hw->lm_cfg = hw->base[IFCVF_LM_BAR];
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IFCVF_DBG(pdev,
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"PCI capability mapping: common cfg: %p, notify base: %p\n, isr cfg: %p, device cfg: %p, multiplier: %u\n",
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hw->common_cfg, hw->notify_base, hw->isr,
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hw->dev_cfg, hw->notify_off_multiplier);
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hw->vqs_reused_irq = -EINVAL;
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hw->config_irq = -EINVAL;
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return 0;
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}
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u8 ifcvf_get_status(struct ifcvf_hw *hw)
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{
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return vp_ioread8(&hw->common_cfg->device_status);
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}
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void ifcvf_set_status(struct ifcvf_hw *hw, u8 status)
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{
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vp_iowrite8(status, &hw->common_cfg->device_status);
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}
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void ifcvf_reset(struct ifcvf_hw *hw)
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{
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hw->config_cb.callback = NULL;
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hw->config_cb.private = NULL;
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ifcvf_set_status(hw, 0);
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/* flush set_status, make sure VF is stopped, reset */
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ifcvf_get_status(hw);
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}
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static void ifcvf_add_status(struct ifcvf_hw *hw, u8 status)
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{
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if (status != 0)
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status |= ifcvf_get_status(hw);
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ifcvf_set_status(hw, status);
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ifcvf_get_status(hw);
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}
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u64 ifcvf_get_hw_features(struct ifcvf_hw *hw)
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{
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struct virtio_pci_common_cfg __iomem *cfg = hw->common_cfg;
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u32 features_lo, features_hi;
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u64 features;
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vp_iowrite32(0, &cfg->device_feature_select);
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features_lo = vp_ioread32(&cfg->device_feature);
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vp_iowrite32(1, &cfg->device_feature_select);
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features_hi = vp_ioread32(&cfg->device_feature);
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features = ((u64)features_hi << 32) | features_lo;
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return features;
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}
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u64 ifcvf_get_features(struct ifcvf_hw *hw)
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{
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return hw->hw_features;
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}
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int ifcvf_verify_min_features(struct ifcvf_hw *hw, u64 features)
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{
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if (!(features & BIT_ULL(VIRTIO_F_ACCESS_PLATFORM)) && features) {
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IFCVF_ERR(hw->pdev, "VIRTIO_F_ACCESS_PLATFORM is not negotiated\n");
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return -EINVAL;
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}
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return 0;
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}
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u32 ifcvf_get_config_size(struct ifcvf_hw *hw)
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{
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u32 net_config_size = sizeof(struct virtio_net_config);
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u32 blk_config_size = sizeof(struct virtio_blk_config);
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u32 cap_size = hw->cap_dev_config_size;
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u32 config_size;
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/* If the onboard device config space size is greater than
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* the size of struct virtio_net/blk_config, only the spec
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* implementing contents size is returned, this is very
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* unlikely, defensive programming.
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*/
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switch (hw->dev_type) {
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case VIRTIO_ID_NET:
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config_size = min(cap_size, net_config_size);
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break;
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case VIRTIO_ID_BLOCK:
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config_size = min(cap_size, blk_config_size);
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break;
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default:
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config_size = 0;
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IFCVF_ERR(hw->pdev, "VIRTIO ID %u not supported\n", hw->dev_type);
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}
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return config_size;
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}
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void ifcvf_read_dev_config(struct ifcvf_hw *hw, u64 offset,
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void *dst, int length)
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{
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u8 old_gen, new_gen, *p;
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int i;
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WARN_ON(offset + length > hw->config_size);
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do {
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old_gen = vp_ioread8(&hw->common_cfg->config_generation);
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p = dst;
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for (i = 0; i < length; i++)
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*p++ = vp_ioread8(hw->dev_cfg + offset + i);
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new_gen = vp_ioread8(&hw->common_cfg->config_generation);
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} while (old_gen != new_gen);
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}
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void ifcvf_write_dev_config(struct ifcvf_hw *hw, u64 offset,
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const void *src, int length)
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{
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const u8 *p;
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int i;
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p = src;
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WARN_ON(offset + length > hw->config_size);
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for (i = 0; i < length; i++)
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vp_iowrite8(*p++, hw->dev_cfg + offset + i);
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}
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static void ifcvf_set_features(struct ifcvf_hw *hw, u64 features)
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{
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struct virtio_pci_common_cfg __iomem *cfg = hw->common_cfg;
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vp_iowrite32(0, &cfg->guest_feature_select);
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vp_iowrite32((u32)features, &cfg->guest_feature);
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vp_iowrite32(1, &cfg->guest_feature_select);
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vp_iowrite32(features >> 32, &cfg->guest_feature);
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}
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static int ifcvf_config_features(struct ifcvf_hw *hw)
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{
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ifcvf_set_features(hw, hw->req_features);
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ifcvf_add_status(hw, VIRTIO_CONFIG_S_FEATURES_OK);
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if (!(ifcvf_get_status(hw) & VIRTIO_CONFIG_S_FEATURES_OK)) {
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IFCVF_ERR(hw->pdev, "Failed to set FEATURES_OK status\n");
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return -EIO;
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}
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return 0;
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}
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u16 ifcvf_get_vq_state(struct ifcvf_hw *hw, u16 qid)
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{
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struct ifcvf_lm_cfg __iomem *ifcvf_lm;
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void __iomem *avail_idx_addr;
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u16 last_avail_idx;
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u32 q_pair_id;
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ifcvf_lm = (struct ifcvf_lm_cfg __iomem *)hw->lm_cfg;
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q_pair_id = qid / 2;
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avail_idx_addr = &ifcvf_lm->vring_lm_cfg[q_pair_id].idx_addr[qid % 2];
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last_avail_idx = vp_ioread16(avail_idx_addr);
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return last_avail_idx;
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}
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int ifcvf_set_vq_state(struct ifcvf_hw *hw, u16 qid, u16 num)
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{
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struct ifcvf_lm_cfg __iomem *ifcvf_lm;
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void __iomem *avail_idx_addr;
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u32 q_pair_id;
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ifcvf_lm = (struct ifcvf_lm_cfg __iomem *)hw->lm_cfg;
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q_pair_id = qid / 2;
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avail_idx_addr = &ifcvf_lm->vring_lm_cfg[q_pair_id].idx_addr[qid % 2];
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hw->vring[qid].last_avail_idx = num;
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vp_iowrite16(num, avail_idx_addr);
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return 0;
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}
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static int ifcvf_hw_enable(struct ifcvf_hw *hw)
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{
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struct virtio_pci_common_cfg __iomem *cfg;
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u32 i;
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cfg = hw->common_cfg;
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for (i = 0; i < hw->nr_vring; i++) {
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if (!hw->vring[i].ready)
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break;
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vp_iowrite16(i, &cfg->queue_select);
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vp_iowrite64_twopart(hw->vring[i].desc, &cfg->queue_desc_lo,
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&cfg->queue_desc_hi);
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vp_iowrite64_twopart(hw->vring[i].avail, &cfg->queue_avail_lo,
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&cfg->queue_avail_hi);
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vp_iowrite64_twopart(hw->vring[i].used, &cfg->queue_used_lo,
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&cfg->queue_used_hi);
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vp_iowrite16(hw->vring[i].size, &cfg->queue_size);
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ifcvf_set_vq_state(hw, i, hw->vring[i].last_avail_idx);
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vp_iowrite16(1, &cfg->queue_enable);
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}
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return 0;
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}
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static void ifcvf_hw_disable(struct ifcvf_hw *hw)
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{
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u32 i;
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||
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ifcvf_set_config_vector(hw, VIRTIO_MSI_NO_VECTOR);
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for (i = 0; i < hw->nr_vring; i++) {
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ifcvf_set_vq_vector(hw, i, VIRTIO_MSI_NO_VECTOR);
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}
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}
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int ifcvf_start_hw(struct ifcvf_hw *hw)
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||
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{
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ifcvf_reset(hw);
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ifcvf_add_status(hw, VIRTIO_CONFIG_S_ACKNOWLEDGE);
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ifcvf_add_status(hw, VIRTIO_CONFIG_S_DRIVER);
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||
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if (ifcvf_config_features(hw) < 0)
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return -EINVAL;
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|
|
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||
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if (ifcvf_hw_enable(hw) < 0)
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||
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return -EINVAL;
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|
|
|
||
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ifcvf_add_status(hw, VIRTIO_CONFIG_S_DRIVER_OK);
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|
|
|
||
|
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return 0;
|
||
|
|
}
|
||
|
|
|
||
|
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void ifcvf_stop_hw(struct ifcvf_hw *hw)
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||
|
|
{
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||
|
|
ifcvf_hw_disable(hw);
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||
|
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ifcvf_reset(hw);
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||
|
|
}
|
||
|
|
|
||
|
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void ifcvf_notify_queue(struct ifcvf_hw *hw, u16 qid)
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||
|
|
{
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||
|
|
vp_iowrite16(qid, hw->vring[qid].notify_addr);
|
||
|
|
}
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