127 lines
3.9 KiB
Plaintext
127 lines
3.9 KiB
Plaintext
|
# SPDX-License-Identifier: GPL-2.0-only
|
||
|
|
#
|
||
|
|
# Phy drivers for Qualcomm and Atheros platforms
|
||
|
|
#
|
||
|
|
config PHY_ATH79_USB
|
||
|
|
tristate "Atheros AR71XX/9XXX USB PHY driver"
|
||
|
|
depends on OF && (ATH79 || COMPILE_TEST)
|
||
|
|
default y if USB_EHCI_HCD_PLATFORM || USB_OHCI_HCD_PLATFORM
|
||
|
|
select RESET_CONTROLLER
|
||
|
|
select GENERIC_PHY
|
||
|
|
help
|
||
|
|
Enable this to support the USB PHY on Atheros AR71XX/9XXX SoCs.
|
||
|
|
|
||
|
|
config PHY_QCOM_APQ8064_SATA
|
||
|
|
tristate "Qualcomm APQ8064 SATA SerDes/PHY driver"
|
||
|
|
depends on ARCH_QCOM
|
||
|
|
depends on HAS_IOMEM
|
||
|
|
depends on OF
|
||
|
|
select GENERIC_PHY
|
||
|
|
|
||
|
|
config PHY_QCOM_EDP
|
||
|
|
tristate "Qualcomm eDP PHY driver"
|
||
|
|
depends on ARCH_QCOM || COMPILE_TEST
|
||
|
|
depends on OF
|
||
|
|
depends on COMMON_CLK
|
||
|
|
select GENERIC_PHY
|
||
|
|
help
|
||
|
|
Enable this driver to support the Qualcomm eDP PHY found in various
|
||
|
|
Qualcomm chipsets.
|
||
|
|
|
||
|
|
config PHY_QCOM_IPQ4019_USB
|
||
|
|
tristate "Qualcomm IPQ4019 USB PHY driver"
|
||
|
|
depends on OF && (ARCH_QCOM || COMPILE_TEST)
|
||
|
|
select GENERIC_PHY
|
||
|
|
help
|
||
|
|
Support for the USB PHY-s on Qualcomm IPQ40xx SoC-s.
|
||
|
|
|
||
|
|
config PHY_QCOM_IPQ806X_SATA
|
||
|
|
tristate "Qualcomm IPQ806x SATA SerDes/PHY driver"
|
||
|
|
depends on ARCH_QCOM
|
||
|
|
depends on HAS_IOMEM
|
||
|
|
depends on OF
|
||
|
|
select GENERIC_PHY
|
||
|
|
|
||
|
|
config PHY_QCOM_PCIE2
|
||
|
|
tristate "Qualcomm PCIe Gen2 PHY Driver"
|
||
|
|
depends on OF && COMMON_CLK && (ARCH_QCOM || COMPILE_TEST)
|
||
|
|
select GENERIC_PHY
|
||
|
|
help
|
||
|
|
Enable this to support the Qualcomm PCIe PHY, used with the Synopsys
|
||
|
|
based PCIe controller.
|
||
|
|
|
||
|
|
config PHY_QCOM_QMP
|
||
|
|
tristate "Qualcomm QMP PHY Driver"
|
||
|
|
depends on OF && COMMON_CLK && (ARCH_QCOM || COMPILE_TEST)
|
||
|
|
select GENERIC_PHY
|
||
|
|
help
|
||
|
|
Enable this to support the QMP PHY transceiver that is used
|
||
|
|
with controllers such as PCIe, UFS, and USB on Qualcomm chips.
|
||
|
|
|
||
|
|
config PHY_QCOM_QUSB2
|
||
|
|
tristate "Qualcomm QUSB2 PHY Driver"
|
||
|
|
depends on OF && (ARCH_QCOM || COMPILE_TEST)
|
||
|
|
depends on NVMEM || !NVMEM
|
||
|
|
select GENERIC_PHY
|
||
|
|
help
|
||
|
|
Enable this to support the HighSpeed QUSB2 PHY transceiver for USB
|
||
|
|
controllers on Qualcomm chips. This driver supports the high-speed
|
||
|
|
PHY which is usually paired with either the ChipIdea or Synopsys DWC3
|
||
|
|
USB IPs on MSM SOCs.
|
||
|
|
|
||
|
|
config PHY_QCOM_USB_HS
|
||
|
|
tristate "Qualcomm USB HS PHY module"
|
||
|
|
depends on USB_ULPI_BUS
|
||
|
|
depends on EXTCON || !EXTCON # if EXTCON=m, this cannot be built-in
|
||
|
|
select GENERIC_PHY
|
||
|
|
help
|
||
|
|
Support for the USB high-speed ULPI compliant phy on Qualcomm
|
||
|
|
chipsets.
|
||
|
|
|
||
|
|
config PHY_QCOM_USB_SNPS_FEMTO_V2
|
||
|
|
tristate "Qualcomm SNPS FEMTO USB HS PHY V2 module"
|
||
|
|
depends on OF && (ARCH_QCOM || COMPILE_TEST)
|
||
|
|
select GENERIC_PHY
|
||
|
|
help
|
||
|
|
Enable support for the USB high-speed SNPS Femto phy on Qualcomm
|
||
|
|
chipsets. This PHY has differences in the register map compared
|
||
|
|
to the V1 variants. The PHY is paired with a Synopsys DWC3 USB
|
||
|
|
controller on Qualcomm SOCs.
|
||
|
|
|
||
|
|
config PHY_QCOM_USB_HSIC
|
||
|
|
tristate "Qualcomm USB HSIC ULPI PHY module"
|
||
|
|
depends on USB_ULPI_BUS
|
||
|
|
select GENERIC_PHY
|
||
|
|
help
|
||
|
|
Support for the USB HSIC ULPI compliant PHY on QCOM chipsets.
|
||
|
|
|
||
|
|
config PHY_QCOM_USB_HS_28NM
|
||
|
|
tristate "Qualcomm 28nm High-Speed PHY"
|
||
|
|
depends on OF && (ARCH_QCOM || COMPILE_TEST)
|
||
|
|
depends on EXTCON || !EXTCON # if EXTCON=m, this cannot be built-in
|
||
|
|
select GENERIC_PHY
|
||
|
|
help
|
||
|
|
Enable this to support the Qualcomm Synopsys DesignWare Core 28nm
|
||
|
|
High-Speed PHY driver. This driver supports the Hi-Speed PHY which
|
||
|
|
is usually paired with either the ChipIdea or Synopsys DWC3 USB
|
||
|
|
IPs on MSM SOCs.
|
||
|
|
|
||
|
|
config PHY_QCOM_USB_SS
|
||
|
|
tristate "Qualcomm USB Super-Speed PHY driver"
|
||
|
|
depends on OF && (ARCH_QCOM || COMPILE_TEST)
|
||
|
|
depends on EXTCON || !EXTCON # if EXTCON=m, this cannot be built-in
|
||
|
|
select GENERIC_PHY
|
||
|
|
help
|
||
|
|
Enable this to support the Super-Speed USB transceiver on various
|
||
|
|
Qualcomm chipsets.
|
||
|
|
|
||
|
|
config PHY_QCOM_IPQ806X_USB
|
||
|
|
tristate "Qualcomm IPQ806x DWC3 USB PHY driver"
|
||
|
|
depends on HAS_IOMEM
|
||
|
|
depends on OF && (ARCH_QCOM || COMPILE_TEST)
|
||
|
|
select GENERIC_PHY
|
||
|
|
help
|
||
|
|
This option enables support for the Synopsis PHYs present inside the
|
||
|
|
Qualcomm USB3.0 DWC3 controller on ipq806x SoC. This driver supports
|
||
|
|
both HS and SS PHY controllers.
|