274 lines
7.2 KiB
C
274 lines
7.2 KiB
C
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/* SPDX-License-Identifier: ISC */
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/*
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* Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
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* Copyright (C) 2018 Stanislaw Gruszka <stf_xl@wp.pl>
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*/
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#ifndef __MT76x02_H
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#define __MT76x02_H
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#include <linux/kfifo.h>
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#include "mt76.h"
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#include "mt76x02_regs.h"
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#include "mt76x02_mac.h"
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#include "mt76x02_dfs.h"
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#include "mt76x02_dma.h"
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#define MT76x02_TX_RING_SIZE 512
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#define MT76x02_PSD_RING_SIZE 128
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#define MT76x02_N_WCIDS 128
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#define MT_CALIBRATE_INTERVAL HZ
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#define MT_MAC_WORK_INTERVAL (HZ / 10)
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#define MT_WATCHDOG_TIME (HZ / 10)
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#define MT_TX_HANG_TH 10
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#define MT_MAX_CHAINS 2
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struct mt76x02_rx_freq_cal {
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s8 high_gain[MT_MAX_CHAINS];
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s8 rssi_offset[MT_MAX_CHAINS];
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s8 lna_gain;
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u32 mcu_gain;
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s16 temp_offset;
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u8 freq_offset;
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};
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struct mt76x02_calibration {
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struct mt76x02_rx_freq_cal rx;
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u8 agc_gain_init[MT_MAX_CHAINS];
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u8 agc_gain_cur[MT_MAX_CHAINS];
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u16 false_cca;
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s8 avg_rssi_all;
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s8 agc_gain_adjust;
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s8 agc_lowest_gain;
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s8 low_gain;
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s8 temp_vco;
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s8 temp;
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bool init_cal_done;
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bool tssi_cal_done;
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bool tssi_comp_pending;
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bool dpd_cal_done;
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bool channel_cal_done;
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bool gain_init_done;
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int tssi_target;
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s8 tssi_dc;
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};
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struct mt76x02_beacon_ops {
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unsigned int nslots;
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unsigned int slot_size;
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void (*pre_tbtt_enable)(struct mt76x02_dev *dev, bool en);
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void (*beacon_enable)(struct mt76x02_dev *dev, bool en);
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};
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#define mt76x02_beacon_enable(dev, enable) \
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(dev)->beacon_ops->beacon_enable(dev, enable)
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#define mt76x02_pre_tbtt_enable(dev, enable) \
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(dev)->beacon_ops->pre_tbtt_enable(dev, enable)
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struct mt76x02_dev {
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union { /* must be first */
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struct mt76_dev mt76;
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struct mt76_phy mphy;
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};
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struct mac_address macaddr_list[8];
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struct mutex phy_mutex;
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u8 txdone_seq;
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DECLARE_KFIFO_PTR(txstatus_fifo, struct mt76x02_tx_status);
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spinlock_t txstatus_fifo_lock;
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u32 tx_airtime;
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u32 ampdu_ref;
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struct sk_buff *rx_head;
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struct delayed_work cal_work;
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struct delayed_work wdt_work;
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struct hrtimer pre_tbtt_timer;
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struct work_struct pre_tbtt_work;
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const struct mt76x02_beacon_ops *beacon_ops;
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u8 beacon_data_count;
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u8 tbtt_count;
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u32 tx_hang_reset;
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u8 tx_hang_check[4];
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u8 beacon_hang_check;
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u8 mcu_timeout;
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struct mt76x02_calibration cal;
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int txpower_conf;
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s8 target_power;
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s8 target_power_delta[2];
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bool enable_tpc;
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bool no_2ghz;
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s16 coverage_class;
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u8 slottime;
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struct mt76x02_dfs_pattern_detector dfs_pd;
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/* edcca monitor */
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unsigned long ed_trigger_timeout;
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bool ed_tx_blocked;
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bool ed_monitor;
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u8 ed_monitor_enabled;
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u8 ed_monitor_learning;
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u8 ed_trigger;
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u8 ed_silent;
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ktime_t ed_time;
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};
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extern struct ieee80211_rate mt76x02_rates[12];
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int mt76x02_init_device(struct mt76x02_dev *dev);
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void mt76x02_configure_filter(struct ieee80211_hw *hw,
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unsigned int changed_flags,
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unsigned int *total_flags, u64 multicast);
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int mt76x02_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif,
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struct ieee80211_sta *sta);
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void mt76x02_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif,
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struct ieee80211_sta *sta);
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void mt76x02_config_mac_addr_list(struct mt76x02_dev *dev);
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int mt76x02_add_interface(struct ieee80211_hw *hw,
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struct ieee80211_vif *vif);
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void mt76x02_remove_interface(struct ieee80211_hw *hw,
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struct ieee80211_vif *vif);
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int mt76x02_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
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struct ieee80211_ampdu_params *params);
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int mt76x02_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
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struct ieee80211_vif *vif, struct ieee80211_sta *sta,
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struct ieee80211_key_conf *key);
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int mt76x02_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
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unsigned int link_id, u16 queue,
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const struct ieee80211_tx_queue_params *params);
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void mt76x02_sta_rate_tbl_update(struct ieee80211_hw *hw,
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struct ieee80211_vif *vif,
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struct ieee80211_sta *sta);
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s8 mt76x02_tx_get_max_txpwr_adj(struct mt76x02_dev *dev,
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const struct ieee80211_tx_rate *rate);
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s8 mt76x02_tx_get_txpwr_adj(struct mt76x02_dev *dev, s8 txpwr,
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s8 max_txpwr_adj);
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void mt76x02_wdt_work(struct work_struct *work);
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void mt76x02_tx_set_txpwr_auto(struct mt76x02_dev *dev, s8 txpwr);
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void mt76x02_set_tx_ackto(struct mt76x02_dev *dev);
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void mt76x02_set_coverage_class(struct ieee80211_hw *hw,
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s16 coverage_class);
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int mt76x02_set_rts_threshold(struct ieee80211_hw *hw, u32 val);
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void mt76x02_remove_hdr_pad(struct sk_buff *skb, int len);
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bool mt76x02_tx_status_data(struct mt76_dev *mdev, u8 *update);
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void mt76x02_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q,
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struct sk_buff *skb);
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void mt76x02_rx_poll_complete(struct mt76_dev *mdev, enum mt76_rxq_id q);
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irqreturn_t mt76x02_irq_handler(int irq, void *dev_instance);
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void mt76x02_tx(struct ieee80211_hw *hw, struct ieee80211_tx_control *control,
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struct sk_buff *skb);
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int mt76x02_tx_prepare_skb(struct mt76_dev *mdev, void *txwi,
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enum mt76_txq_id qid, struct mt76_wcid *wcid,
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struct ieee80211_sta *sta,
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struct mt76_tx_info *tx_info);
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void mt76x02_sw_scan_complete(struct ieee80211_hw *hw,
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struct ieee80211_vif *vif);
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void mt76x02_sta_ps(struct mt76_dev *dev, struct ieee80211_sta *sta, bool ps);
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void mt76x02_bss_info_changed(struct ieee80211_hw *hw,
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struct ieee80211_vif *vif,
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struct ieee80211_bss_conf *info, u64 changed);
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void mt76x02_reconfig_complete(struct ieee80211_hw *hw,
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enum ieee80211_reconfig_type reconfig_type);
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struct beacon_bc_data {
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struct mt76x02_dev *dev;
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struct sk_buff_head q;
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struct sk_buff *tail[8];
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};
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void mt76x02_init_beacon_config(struct mt76x02_dev *dev);
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void mt76x02e_init_beacon_config(struct mt76x02_dev *dev);
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void mt76x02_resync_beacon_timer(struct mt76x02_dev *dev);
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void mt76x02_update_beacon_iter(void *priv, u8 *mac, struct ieee80211_vif *vif);
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void mt76x02_enqueue_buffered_bc(struct mt76x02_dev *dev,
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struct beacon_bc_data *data,
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int max_nframes);
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void mt76x02_mac_start(struct mt76x02_dev *dev);
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void mt76x02_init_debugfs(struct mt76x02_dev *dev);
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static inline bool is_mt76x0(struct mt76x02_dev *dev)
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{
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return mt76_chip(&dev->mt76) == 0x7610 ||
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mt76_chip(&dev->mt76) == 0x7630 ||
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mt76_chip(&dev->mt76) == 0x7650;
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}
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static inline bool is_mt76x2(struct mt76x02_dev *dev)
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{
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return mt76_chip(&dev->mt76) == 0x7612 ||
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mt76_chip(&dev->mt76) == 0x7632 ||
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mt76_chip(&dev->mt76) == 0x7662 ||
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mt76_chip(&dev->mt76) == 0x7602;
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}
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static inline void mt76x02_irq_enable(struct mt76x02_dev *dev, u32 mask)
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{
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mt76_set_irq_mask(&dev->mt76, MT_INT_MASK_CSR, 0, mask);
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}
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static inline void mt76x02_irq_disable(struct mt76x02_dev *dev, u32 mask)
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{
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mt76_set_irq_mask(&dev->mt76, MT_INT_MASK_CSR, mask, 0);
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}
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static inline bool
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mt76x02_wait_for_txrx_idle(struct mt76_dev *dev)
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{
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return __mt76_poll_msec(dev, MT_MAC_STATUS,
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MT_MAC_STATUS_TX | MT_MAC_STATUS_RX,
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0, 100);
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}
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static inline struct mt76x02_sta *
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mt76x02_rx_get_sta(struct mt76_dev *dev, u8 idx)
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{
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struct mt76_wcid *wcid;
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if (idx >= MT76x02_N_WCIDS)
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return NULL;
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wcid = rcu_dereference(dev->wcid[idx]);
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if (!wcid)
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return NULL;
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return container_of(wcid, struct mt76x02_sta, wcid);
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}
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static inline struct mt76_wcid *
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mt76x02_rx_get_sta_wcid(struct mt76x02_sta *sta, bool unicast)
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{
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if (!sta)
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return NULL;
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if (unicast)
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return &sta->wcid;
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else
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return &sta->vif->group_wcid;
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}
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#endif /* __MT76x02_H */
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