242 lines
7.4 KiB
C
242 lines
7.4 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2018 Linaro Limited, All rights reserved.
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* Author: Mike Leach <mike.leach@linaro.org>
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*/
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#ifndef _CORESIGHT_CORESIGHT_CTI_H
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#define _CORESIGHT_CORESIGHT_CTI_H
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#include <linux/coresight.h>
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#include <linux/device.h>
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#include <linux/fwnode.h>
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#include <linux/list.h>
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#include <linux/spinlock.h>
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#include <linux/sysfs.h>
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#include <linux/types.h>
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#include "coresight-priv.h"
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/*
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* Device registers
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* 0x000 - 0x144: CTI programming and status
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* 0xEDC - 0xEF8: CTI integration test.
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* 0xF00 - 0xFFC: Coresight management registers.
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*/
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/* CTI programming registers */
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#define CTICONTROL 0x000
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#define CTIINTACK 0x010
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#define CTIAPPSET 0x014
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#define CTIAPPCLEAR 0x018
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#define CTIAPPPULSE 0x01C
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#define CTIINEN(n) (0x020 + (4 * n))
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#define CTIOUTEN(n) (0x0A0 + (4 * n))
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#define CTITRIGINSTATUS 0x130
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#define CTITRIGOUTSTATUS 0x134
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#define CTICHINSTATUS 0x138
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#define CTICHOUTSTATUS 0x13C
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#define CTIGATE 0x140
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#define ASICCTL 0x144
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/* Integration test registers */
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#define ITCHINACK 0xEDC /* WO CTI CSSoc 400 only*/
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#define ITTRIGINACK 0xEE0 /* WO CTI CSSoc 400 only*/
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#define ITCHOUT 0xEE4 /* WO RW-600 */
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#define ITTRIGOUT 0xEE8 /* WO RW-600 */
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#define ITCHOUTACK 0xEEC /* RO CTI CSSoc 400 only*/
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#define ITTRIGOUTACK 0xEF0 /* RO CTI CSSoc 400 only*/
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#define ITCHIN 0xEF4 /* RO */
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#define ITTRIGIN 0xEF8 /* RO */
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/* management registers */
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#define CTIDEVAFF0 0xFA8
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#define CTIDEVAFF1 0xFAC
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/*
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* CTI CSSoc 600 has a max of 32 trigger signals per direction.
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* CTI CSSoc 400 has 8 IO triggers - other CTIs can be impl def.
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* Max of in and out defined in the DEVID register.
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* - pick up actual number used from .dts parameters if present.
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*/
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#define CTIINOUTEN_MAX 32
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/**
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* Group of related trigger signals
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*
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* @nr_sigs: number of signals in the group.
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* @used_mask: bitmask representing the signal indexes in the group.
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* @sig_types: array of types for the signals, length nr_sigs.
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*/
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struct cti_trig_grp {
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int nr_sigs;
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u32 used_mask;
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int sig_types[];
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};
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/**
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* Trigger connection - connection between a CTI and other (coresight) device
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* lists input and output trigger signals for the device
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*
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* @con_in: connected CTIIN signals for the device.
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* @con_out: connected CTIOUT signals for the device.
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* @con_dev: coresight device connected to the CTI, NULL if not CS device
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* @con_dev_name: name of connected device (CS or CPU)
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* @node: entry node in list of connections.
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* @con_attrs: Dynamic sysfs attributes specific to this connection.
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* @attr_group: Dynamic attribute group created for this connection.
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*/
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struct cti_trig_con {
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struct cti_trig_grp *con_in;
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struct cti_trig_grp *con_out;
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struct coresight_device *con_dev;
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const char *con_dev_name;
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struct list_head node;
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struct attribute **con_attrs;
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struct attribute_group *attr_group;
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};
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/**
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* struct cti_device - description of CTI device properties.
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*
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* @nt_trig_con: Number of external devices connected to this device.
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* @ctm_id: which CTM this device is connected to (by default it is
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* assumed there is a single CTM per SoC, ID 0).
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* @trig_cons: list of connections to this device.
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* @cpu: CPU ID if associated with CPU, -1 otherwise.
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* @con_groups: combined static and dynamic sysfs groups for trigger
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* connections.
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*/
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struct cti_device {
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int nr_trig_con;
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u32 ctm_id;
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struct list_head trig_cons;
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int cpu;
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const struct attribute_group **con_groups;
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};
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/**
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* struct cti_config - configuration of the CTI device hardware
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*
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* @nr_trig_max: Max number of trigger signals implemented on device.
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* (max of trig_in or trig_out) - from ID register.
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* @nr_ctm_channels: number of available CTM channels - from ID register.
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* @enable_req_count: CTI is enabled alongside >=1 associated devices.
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* @hw_enabled: true if hw is currently enabled.
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* @hw_powered: true if associated cpu powered on, or no cpu.
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* @trig_in_use: bitfield of in triggers registered as in use.
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* @trig_out_use: bitfield of out triggers registered as in use.
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* @trig_out_filter: bitfield of out triggers that are blocked if filter
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* enabled. Typically this would be dbgreq / restart on
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* a core CTI.
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* @trig_filter_enable: 1 if filtering enabled.
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* @xtrig_rchan_sel: channel selection for xtrigger connection show.
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* @ctiappset: CTI Software application channel set.
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* @ctiinout_sel: register selector for INEN and OUTEN regs.
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* @ctiinen: enable input trigger to a channel.
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* @ctiouten: enable output trigger from a channel.
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* @ctigate: gate channel output from CTI to CTM.
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* @asicctl: asic control register.
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*/
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struct cti_config {
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/* hardware description */
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int nr_ctm_channels;
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int nr_trig_max;
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/* cti enable control */
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atomic_t enable_req_count;
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bool hw_enabled;
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bool hw_powered;
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/* registered triggers and filtering */
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u32 trig_in_use;
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u32 trig_out_use;
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u32 trig_out_filter;
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bool trig_filter_enable;
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u8 xtrig_rchan_sel;
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/* cti cross trig programmable regs */
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u32 ctiappset;
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u8 ctiinout_sel;
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u32 ctiinen[CTIINOUTEN_MAX];
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u32 ctiouten[CTIINOUTEN_MAX];
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u32 ctigate;
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u32 asicctl;
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};
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/**
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* struct cti_drvdata - specifics for the CTI device
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* @base: Memory mapped base address for this component..
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* @csdev: Standard CoreSight device information.
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* @ctidev: Extra information needed by the CTI/CTM framework.
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* @spinlock: Control data access to one at a time.
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* @config: Configuration data for this CTI device.
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* @node: List entry of this device in the list of CTI devices.
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* @csdev_release: release function for underlying coresight_device.
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*/
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struct cti_drvdata {
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void __iomem *base;
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struct coresight_device *csdev;
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struct cti_device ctidev;
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spinlock_t spinlock;
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struct cti_config config;
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struct list_head node;
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void (*csdev_release)(struct device *dev);
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};
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/*
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* Channel operation types.
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*/
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enum cti_chan_op {
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CTI_CHAN_ATTACH,
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CTI_CHAN_DETACH,
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};
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enum cti_trig_dir {
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CTI_TRIG_IN,
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CTI_TRIG_OUT,
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};
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enum cti_chan_gate_op {
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CTI_GATE_CHAN_ENABLE,
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CTI_GATE_CHAN_DISABLE,
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};
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enum cti_chan_set_op {
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CTI_CHAN_SET,
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CTI_CHAN_CLR,
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CTI_CHAN_PULSE,
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};
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/* private cti driver fns & vars */
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extern const struct attribute_group *coresight_cti_groups[];
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int cti_add_default_connection(struct device *dev,
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struct cti_drvdata *drvdata);
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int cti_add_connection_entry(struct device *dev, struct cti_drvdata *drvdata,
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struct cti_trig_con *tc,
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struct coresight_device *csdev,
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const char *assoc_dev_name);
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struct cti_trig_con *cti_allocate_trig_con(struct device *dev, int in_sigs,
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int out_sigs);
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int cti_enable(struct coresight_device *csdev);
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int cti_disable(struct coresight_device *csdev);
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void cti_write_all_hw_regs(struct cti_drvdata *drvdata);
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void cti_write_intack(struct device *dev, u32 ackval);
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void cti_write_single_reg(struct cti_drvdata *drvdata, int offset, u32 value);
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int cti_channel_trig_op(struct device *dev, enum cti_chan_op op,
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enum cti_trig_dir direction, u32 channel_idx,
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u32 trigger_idx);
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int cti_channel_gate_op(struct device *dev, enum cti_chan_gate_op op,
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u32 channel_idx);
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int cti_channel_setop(struct device *dev, enum cti_chan_set_op op,
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u32 channel_idx);
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int cti_create_cons_sysfs(struct device *dev, struct cti_drvdata *drvdata);
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struct coresight_platform_data *
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coresight_cti_get_platform_data(struct device *dev);
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const char *cti_plat_get_node_name(struct fwnode_handle *fwnode);
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/* cti powered and enabled */
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static inline bool cti_active(struct cti_config *cfg)
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{
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return cfg->hw_powered && cfg->hw_enabled;
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}
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#endif /* _CORESIGHT_CORESIGHT_CTI_H */
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