483 lines
10 KiB
C
483 lines
10 KiB
C
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// SPDX-License-Identifier: GPL-2.0
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/*
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* NewVision NV3052C IPS LCD panel driver
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*
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* Copyright (C) 2020, Paul Cercueil <paul@crapouillou.net>
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* Copyright (C) 2022, Christophe Branchereau <cbranchereau@gmail.com>
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*/
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/gpio/consumer.h>
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#include <linux/media-bus-format.h>
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#include <linux/module.h>
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#include <linux/of_device.h>
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#include <linux/regulator/consumer.h>
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#include <linux/spi/spi.h>
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#include <video/mipi_display.h>
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#include <drm/drm_mipi_dbi.h>
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#include <drm/drm_modes.h>
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#include <drm/drm_panel.h>
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struct nv3052c_panel_info {
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const struct drm_display_mode *display_modes;
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unsigned int num_modes;
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u16 width_mm, height_mm;
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u32 bus_format, bus_flags;
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};
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struct nv3052c {
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struct device *dev;
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struct drm_panel panel;
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struct mipi_dbi dbi;
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const struct nv3052c_panel_info *panel_info;
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struct regulator *supply;
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struct gpio_desc *reset_gpio;
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};
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struct nv3052c_reg {
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u8 cmd;
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u8 val;
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};
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static const struct nv3052c_reg nv3052c_panel_regs[] = {
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{ 0xff, 0x30 },
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{ 0xff, 0x52 },
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{ 0xff, 0x01 },
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{ 0xe3, 0x00 },
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{ 0x40, 0x00 },
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{ 0x03, 0x40 },
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{ 0x04, 0x00 },
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{ 0x05, 0x03 },
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{ 0x08, 0x00 },
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{ 0x09, 0x07 },
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{ 0x0a, 0x01 },
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{ 0x0b, 0x32 },
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{ 0x0c, 0x32 },
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{ 0x0d, 0x0b },
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{ 0x0e, 0x00 },
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{ 0x23, 0xa0 },
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{ 0x24, 0x0c },
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{ 0x25, 0x06 },
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{ 0x26, 0x14 },
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{ 0x27, 0x14 },
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{ 0x38, 0xcc },
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{ 0x39, 0xd7 },
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{ 0x3a, 0x4a },
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{ 0x28, 0x40 },
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{ 0x29, 0x01 },
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{ 0x2a, 0xdf },
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{ 0x49, 0x3c },
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{ 0x91, 0x77 },
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{ 0x92, 0x77 },
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{ 0xa0, 0x55 },
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{ 0xa1, 0x50 },
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{ 0xa4, 0x9c },
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{ 0xa7, 0x02 },
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{ 0xa8, 0x01 },
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{ 0xa9, 0x01 },
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{ 0xaa, 0xfc },
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{ 0xab, 0x28 },
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{ 0xac, 0x06 },
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{ 0xad, 0x06 },
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{ 0xae, 0x06 },
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{ 0xaf, 0x03 },
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{ 0xb0, 0x08 },
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{ 0xb1, 0x26 },
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{ 0xb2, 0x28 },
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{ 0xb3, 0x28 },
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{ 0xb4, 0x33 },
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{ 0xb5, 0x08 },
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{ 0xb6, 0x26 },
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{ 0xb7, 0x08 },
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{ 0xb8, 0x26 },
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{ 0xf0, 0x00 },
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{ 0xf6, 0xc0 },
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{ 0xff, 0x30 },
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{ 0xff, 0x52 },
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{ 0xff, 0x02 },
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{ 0xb0, 0x0b },
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{ 0xb1, 0x16 },
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{ 0xb2, 0x17 },
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{ 0xb3, 0x2c },
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{ 0xb4, 0x32 },
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{ 0xb5, 0x3b },
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{ 0xb6, 0x29 },
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{ 0xb7, 0x40 },
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{ 0xb8, 0x0d },
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{ 0xb9, 0x05 },
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{ 0xba, 0x12 },
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{ 0xbb, 0x10 },
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{ 0xbc, 0x12 },
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{ 0xbd, 0x15 },
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{ 0xbe, 0x19 },
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{ 0xbf, 0x0e },
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{ 0xc0, 0x16 },
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{ 0xc1, 0x0a },
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{ 0xd0, 0x0c },
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{ 0xd1, 0x17 },
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{ 0xd2, 0x14 },
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{ 0xd3, 0x2e },
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{ 0xd4, 0x32 },
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{ 0xd5, 0x3c },
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{ 0xd6, 0x22 },
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{ 0xd7, 0x3d },
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{ 0xd8, 0x0d },
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{ 0xd9, 0x07 },
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{ 0xda, 0x13 },
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{ 0xdb, 0x13 },
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{ 0xdc, 0x11 },
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{ 0xdd, 0x15 },
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{ 0xde, 0x19 },
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{ 0xdf, 0x10 },
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{ 0xe0, 0x17 },
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{ 0xe1, 0x0a },
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{ 0xff, 0x30 },
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{ 0xff, 0x52 },
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{ 0xff, 0x03 },
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{ 0x00, 0x2a },
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{ 0x01, 0x2a },
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{ 0x02, 0x2a },
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{ 0x03, 0x2a },
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{ 0x04, 0x61 },
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{ 0x05, 0x80 },
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{ 0x06, 0xc7 },
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{ 0x07, 0x01 },
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{ 0x08, 0x03 },
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{ 0x09, 0x04 },
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{ 0x70, 0x22 },
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{ 0x71, 0x80 },
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{ 0x30, 0x2a },
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{ 0x31, 0x2a },
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{ 0x32, 0x2a },
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{ 0x33, 0x2a },
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{ 0x34, 0x61 },
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{ 0x35, 0xc5 },
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{ 0x36, 0x80 },
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{ 0x37, 0x23 },
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{ 0x40, 0x03 },
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{ 0x41, 0x04 },
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{ 0x42, 0x05 },
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{ 0x43, 0x06 },
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{ 0x44, 0x11 },
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{ 0x45, 0xe8 },
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{ 0x46, 0xe9 },
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{ 0x47, 0x11 },
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{ 0x48, 0xea },
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{ 0x49, 0xeb },
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{ 0x50, 0x07 },
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{ 0x51, 0x08 },
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{ 0x52, 0x09 },
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{ 0x53, 0x0a },
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{ 0x54, 0x11 },
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{ 0x55, 0xec },
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{ 0x56, 0xed },
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{ 0x57, 0x11 },
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{ 0x58, 0xef },
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{ 0x59, 0xf0 },
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{ 0xb1, 0x01 },
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{ 0xb4, 0x15 },
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{ 0xb5, 0x16 },
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{ 0xb6, 0x09 },
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{ 0xb7, 0x0f },
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{ 0xb8, 0x0d },
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{ 0xb9, 0x0b },
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{ 0xba, 0x00 },
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{ 0xc7, 0x02 },
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{ 0xca, 0x17 },
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{ 0xcb, 0x18 },
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{ 0xcc, 0x0a },
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{ 0xcd, 0x10 },
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{ 0xce, 0x0e },
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{ 0xcf, 0x0c },
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{ 0xd0, 0x00 },
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{ 0x81, 0x00 },
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{ 0x84, 0x15 },
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{ 0x85, 0x16 },
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{ 0x86, 0x10 },
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{ 0x87, 0x0a },
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{ 0x88, 0x0c },
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{ 0x89, 0x0e },
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{ 0x8a, 0x02 },
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{ 0x97, 0x00 },
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{ 0x9a, 0x17 },
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{ 0x9b, 0x18 },
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{ 0x9c, 0x0f },
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{ 0x9d, 0x09 },
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{ 0x9e, 0x0b },
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{ 0x9f, 0x0d },
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{ 0xa0, 0x01 },
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{ 0xff, 0x30 },
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{ 0xff, 0x52 },
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{ 0xff, 0x02 },
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{ 0x01, 0x01 },
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{ 0x02, 0xda },
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{ 0x03, 0xba },
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{ 0x04, 0xa8 },
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{ 0x05, 0x9a },
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{ 0x06, 0x70 },
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{ 0x07, 0xff },
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{ 0x08, 0x91 },
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{ 0x09, 0x90 },
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{ 0x0a, 0xff },
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{ 0x0b, 0x8f },
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{ 0x0c, 0x60 },
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{ 0x0d, 0x58 },
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{ 0x0e, 0x48 },
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{ 0x0f, 0x38 },
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{ 0x10, 0x2b },
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{ 0xff, 0x30 },
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{ 0xff, 0x52 },
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{ 0xff, 0x00 },
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{ 0x36, 0x0a },
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};
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static inline struct nv3052c *to_nv3052c(struct drm_panel *panel)
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{
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return container_of(panel, struct nv3052c, panel);
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}
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static int nv3052c_prepare(struct drm_panel *panel)
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{
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struct nv3052c *priv = to_nv3052c(panel);
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struct mipi_dbi *dbi = &priv->dbi;
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unsigned int i;
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int err;
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err = regulator_enable(priv->supply);
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if (err) {
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dev_err(priv->dev, "Failed to enable power supply: %d\n", err);
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return err;
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}
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/* Reset the chip */
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gpiod_set_value_cansleep(priv->reset_gpio, 1);
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usleep_range(10, 1000);
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gpiod_set_value_cansleep(priv->reset_gpio, 0);
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usleep_range(5000, 20000);
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for (i = 0; i < ARRAY_SIZE(nv3052c_panel_regs); i++) {
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err = mipi_dbi_command(dbi, nv3052c_panel_regs[i].cmd,
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nv3052c_panel_regs[i].val);
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if (err) {
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dev_err(priv->dev, "Unable to set register: %d\n", err);
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goto err_disable_regulator;
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}
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}
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err = mipi_dbi_command(dbi, MIPI_DCS_EXIT_SLEEP_MODE);
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if (err) {
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dev_err(priv->dev, "Unable to exit sleep mode: %d\n", err);
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goto err_disable_regulator;
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}
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return 0;
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err_disable_regulator:
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regulator_disable(priv->supply);
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return err;
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}
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static int nv3052c_unprepare(struct drm_panel *panel)
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{
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struct nv3052c *priv = to_nv3052c(panel);
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struct mipi_dbi *dbi = &priv->dbi;
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int err;
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err = mipi_dbi_command(dbi, MIPI_DCS_ENTER_SLEEP_MODE);
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if (err)
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dev_err(priv->dev, "Unable to enter sleep mode: %d\n", err);
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gpiod_set_value_cansleep(priv->reset_gpio, 1);
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regulator_disable(priv->supply);
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return 0;
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}
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static int nv3052c_enable(struct drm_panel *panel)
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{
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struct nv3052c *priv = to_nv3052c(panel);
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struct mipi_dbi *dbi = &priv->dbi;
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int err;
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err = mipi_dbi_command(dbi, MIPI_DCS_SET_DISPLAY_ON);
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if (err) {
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dev_err(priv->dev, "Unable to enable display: %d\n", err);
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return err;
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}
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if (panel->backlight) {
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/* Wait for the picture to be ready before enabling backlight */
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msleep(120);
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}
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return 0;
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}
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static int nv3052c_disable(struct drm_panel *panel)
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{
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struct nv3052c *priv = to_nv3052c(panel);
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struct mipi_dbi *dbi = &priv->dbi;
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int err;
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err = mipi_dbi_command(dbi, MIPI_DCS_SET_DISPLAY_OFF);
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if (err) {
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dev_err(priv->dev, "Unable to disable display: %d\n", err);
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return err;
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}
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return 0;
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}
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static int nv3052c_get_modes(struct drm_panel *panel,
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struct drm_connector *connector)
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{
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struct nv3052c *priv = to_nv3052c(panel);
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const struct nv3052c_panel_info *panel_info = priv->panel_info;
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struct drm_display_mode *mode;
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unsigned int i;
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for (i = 0; i < panel_info->num_modes; i++) {
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mode = drm_mode_duplicate(connector->dev,
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&panel_info->display_modes[i]);
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if (!mode)
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return -ENOMEM;
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drm_mode_set_name(mode);
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mode->type = DRM_MODE_TYPE_DRIVER;
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if (panel_info->num_modes == 1)
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mode->type |= DRM_MODE_TYPE_PREFERRED;
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drm_mode_probed_add(connector, mode);
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}
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connector->display_info.bpc = 8;
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connector->display_info.width_mm = panel_info->width_mm;
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connector->display_info.height_mm = panel_info->height_mm;
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drm_display_info_set_bus_formats(&connector->display_info,
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&panel_info->bus_format, 1);
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connector->display_info.bus_flags = panel_info->bus_flags;
|
||
|
|
|
||
|
|
return panel_info->num_modes;
|
||
|
|
}
|
||
|
|
|
||
|
|
static const struct drm_panel_funcs nv3052c_funcs = {
|
||
|
|
.prepare = nv3052c_prepare,
|
||
|
|
.unprepare = nv3052c_unprepare,
|
||
|
|
.enable = nv3052c_enable,
|
||
|
|
.disable = nv3052c_disable,
|
||
|
|
.get_modes = nv3052c_get_modes,
|
||
|
|
};
|
||
|
|
|
||
|
|
static int nv3052c_probe(struct spi_device *spi)
|
||
|
|
{
|
||
|
|
struct device *dev = &spi->dev;
|
||
|
|
struct nv3052c *priv;
|
||
|
|
int err;
|
||
|
|
|
||
|
|
priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
|
||
|
|
if (!priv)
|
||
|
|
return -ENOMEM;
|
||
|
|
|
||
|
|
priv->dev = dev;
|
||
|
|
|
||
|
|
priv->panel_info = of_device_get_match_data(dev);
|
||
|
|
if (!priv->panel_info)
|
||
|
|
return -EINVAL;
|
||
|
|
|
||
|
|
priv->supply = devm_regulator_get(dev, "power");
|
||
|
|
if (IS_ERR(priv->supply))
|
||
|
|
return dev_err_probe(dev, PTR_ERR(priv->supply), "Failed to get power supply\n");
|
||
|
|
|
||
|
|
priv->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
|
||
|
|
if (IS_ERR(priv->reset_gpio))
|
||
|
|
return dev_err_probe(dev, PTR_ERR(priv->reset_gpio), "Failed to get reset GPIO\n");
|
||
|
|
|
||
|
|
err = mipi_dbi_spi_init(spi, &priv->dbi, NULL);
|
||
|
|
if (err)
|
||
|
|
return dev_err_probe(dev, err, "MIPI DBI init failed\n");
|
||
|
|
|
||
|
|
priv->dbi.read_commands = NULL;
|
||
|
|
|
||
|
|
spi_set_drvdata(spi, priv);
|
||
|
|
|
||
|
|
drm_panel_init(&priv->panel, dev, &nv3052c_funcs,
|
||
|
|
DRM_MODE_CONNECTOR_DPI);
|
||
|
|
|
||
|
|
err = drm_panel_of_backlight(&priv->panel);
|
||
|
|
if (err)
|
||
|
|
return dev_err_probe(dev, err, "Failed to attach backlight\n");
|
||
|
|
|
||
|
|
drm_panel_add(&priv->panel);
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static void nv3052c_remove(struct spi_device *spi)
|
||
|
|
{
|
||
|
|
struct nv3052c *priv = spi_get_drvdata(spi);
|
||
|
|
|
||
|
|
drm_panel_remove(&priv->panel);
|
||
|
|
drm_panel_disable(&priv->panel);
|
||
|
|
drm_panel_unprepare(&priv->panel);
|
||
|
|
}
|
||
|
|
|
||
|
|
static const struct drm_display_mode ltk035c5444t_modes[] = {
|
||
|
|
{ /* 60 Hz */
|
||
|
|
.clock = 24000,
|
||
|
|
.hdisplay = 640,
|
||
|
|
.hsync_start = 640 + 96,
|
||
|
|
.hsync_end = 640 + 96 + 16,
|
||
|
|
.htotal = 640 + 96 + 16 + 48,
|
||
|
|
.vdisplay = 480,
|
||
|
|
.vsync_start = 480 + 5,
|
||
|
|
.vsync_end = 480 + 5 + 2,
|
||
|
|
.vtotal = 480 + 5 + 2 + 13,
|
||
|
|
.flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
|
||
|
|
},
|
||
|
|
{ /* 50 Hz */
|
||
|
|
.clock = 18000,
|
||
|
|
.hdisplay = 640,
|
||
|
|
.hsync_start = 640 + 39,
|
||
|
|
.hsync_end = 640 + 39 + 2,
|
||
|
|
.htotal = 640 + 39 + 2 + 39,
|
||
|
|
.vdisplay = 480,
|
||
|
|
.vsync_start = 480 + 5,
|
||
|
|
.vsync_end = 480 + 5 + 2,
|
||
|
|
.vtotal = 480 + 5 + 2 + 13,
|
||
|
|
.flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
|
||
|
|
},
|
||
|
|
};
|
||
|
|
|
||
|
|
static const struct nv3052c_panel_info ltk035c5444t_panel_info = {
|
||
|
|
.display_modes = ltk035c5444t_modes,
|
||
|
|
.num_modes = ARRAY_SIZE(ltk035c5444t_modes),
|
||
|
|
.width_mm = 77,
|
||
|
|
.height_mm = 64,
|
||
|
|
.bus_format = MEDIA_BUS_FMT_RGB888_1X24,
|
||
|
|
.bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE,
|
||
|
|
};
|
||
|
|
|
||
|
|
static const struct of_device_id nv3052c_of_match[] = {
|
||
|
|
{ .compatible = "leadtek,ltk035c5444t", .data = <k035c5444t_panel_info },
|
||
|
|
{ /* sentinel */ }
|
||
|
|
};
|
||
|
|
MODULE_DEVICE_TABLE(of, nv3052c_of_match);
|
||
|
|
|
||
|
|
static struct spi_driver nv3052c_driver = {
|
||
|
|
.driver = {
|
||
|
|
.name = "nv3052c",
|
||
|
|
.of_match_table = nv3052c_of_match,
|
||
|
|
},
|
||
|
|
.probe = nv3052c_probe,
|
||
|
|
.remove = nv3052c_remove,
|
||
|
|
};
|
||
|
|
module_spi_driver(nv3052c_driver);
|
||
|
|
|
||
|
|
MODULE_AUTHOR("Paul Cercueil <paul@crapouillou.net>");
|
||
|
|
MODULE_AUTHOR("Christophe Branchereau <cbranchereau@gmail.com>");
|
||
|
|
MODULE_LICENSE("GPL v2");
|