425 lines
11 KiB
C
425 lines
11 KiB
C
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/*
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* Copyright 2017 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include "vmm.h"
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#include <subdev/fb.h>
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#include <subdev/ltc.h>
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#include <subdev/timer.h>
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#include <nvif/if900d.h>
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#include <nvif/unpack.h>
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static inline void
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gf100_vmm_pgt_pte(struct nvkm_vmm *vmm, struct nvkm_mmu_pt *pt,
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u32 ptei, u32 ptes, struct nvkm_vmm_map *map, u64 addr)
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{
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u64 base = (addr >> 8) | map->type;
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u64 data = base;
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if (map->ctag && !(map->next & (1ULL << 44))) {
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while (ptes--) {
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data = base | ((map->ctag >> 1) << 44);
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if (!(map->ctag++ & 1))
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data |= BIT_ULL(60);
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VMM_WO064(pt, vmm, ptei++ * 8, data);
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base += map->next;
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}
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} else {
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map->type += ptes * map->ctag;
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while (ptes--) {
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VMM_WO064(pt, vmm, ptei++ * 8, data);
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data += map->next;
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}
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}
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}
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void
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gf100_vmm_pgt_sgl(struct nvkm_vmm *vmm, struct nvkm_mmu_pt *pt,
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u32 ptei, u32 ptes, struct nvkm_vmm_map *map)
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{
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VMM_MAP_ITER_SGL(vmm, pt, ptei, ptes, map, gf100_vmm_pgt_pte);
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}
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void
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gf100_vmm_pgt_dma(struct nvkm_vmm *vmm, struct nvkm_mmu_pt *pt,
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u32 ptei, u32 ptes, struct nvkm_vmm_map *map)
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{
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if (map->page->shift == PAGE_SHIFT) {
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VMM_SPAM(vmm, "DMAA %08x %08x PTE(s)", ptei, ptes);
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nvkm_kmap(pt->memory);
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while (ptes--) {
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const u64 data = (*map->dma++ >> 8) | map->type;
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VMM_WO064(pt, vmm, ptei++ * 8, data);
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map->type += map->ctag;
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}
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nvkm_done(pt->memory);
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return;
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}
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VMM_MAP_ITER_DMA(vmm, pt, ptei, ptes, map, gf100_vmm_pgt_pte);
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}
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void
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gf100_vmm_pgt_mem(struct nvkm_vmm *vmm, struct nvkm_mmu_pt *pt,
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u32 ptei, u32 ptes, struct nvkm_vmm_map *map)
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{
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VMM_MAP_ITER_MEM(vmm, pt, ptei, ptes, map, gf100_vmm_pgt_pte);
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}
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void
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gf100_vmm_pgt_unmap(struct nvkm_vmm *vmm,
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struct nvkm_mmu_pt *pt, u32 ptei, u32 ptes)
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{
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VMM_FO064(pt, vmm, ptei * 8, 0ULL, ptes);
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}
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const struct nvkm_vmm_desc_func
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gf100_vmm_pgt = {
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.unmap = gf100_vmm_pgt_unmap,
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.mem = gf100_vmm_pgt_mem,
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.dma = gf100_vmm_pgt_dma,
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.sgl = gf100_vmm_pgt_sgl,
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};
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void
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gf100_vmm_pgd_pde(struct nvkm_vmm *vmm, struct nvkm_vmm_pt *pgd, u32 pdei)
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{
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struct nvkm_vmm_pt *pgt = pgd->pde[pdei];
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struct nvkm_mmu_pt *pd = pgd->pt[0];
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struct nvkm_mmu_pt *pt;
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u64 data = 0;
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if ((pt = pgt->pt[0])) {
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switch (nvkm_memory_target(pt->memory)) {
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case NVKM_MEM_TARGET_VRAM: data |= 1ULL << 0; break;
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case NVKM_MEM_TARGET_HOST: data |= 2ULL << 0;
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data |= BIT_ULL(35); /* VOL */
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break;
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case NVKM_MEM_TARGET_NCOH: data |= 3ULL << 0; break;
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default:
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WARN_ON(1);
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return;
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}
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data |= pt->addr >> 8;
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}
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if ((pt = pgt->pt[1])) {
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switch (nvkm_memory_target(pt->memory)) {
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case NVKM_MEM_TARGET_VRAM: data |= 1ULL << 32; break;
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case NVKM_MEM_TARGET_HOST: data |= 2ULL << 32;
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data |= BIT_ULL(34); /* VOL */
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break;
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case NVKM_MEM_TARGET_NCOH: data |= 3ULL << 32; break;
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default:
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WARN_ON(1);
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return;
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}
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data |= pt->addr << 24;
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}
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nvkm_kmap(pd->memory);
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VMM_WO064(pd, vmm, pdei * 8, data);
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nvkm_done(pd->memory);
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}
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const struct nvkm_vmm_desc_func
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gf100_vmm_pgd = {
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.unmap = gf100_vmm_pgt_unmap,
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.pde = gf100_vmm_pgd_pde,
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};
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static const struct nvkm_vmm_desc
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gf100_vmm_desc_17_12[] = {
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{ SPT, 15, 8, 0x1000, &gf100_vmm_pgt },
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{ PGD, 13, 8, 0x1000, &gf100_vmm_pgd },
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{}
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};
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static const struct nvkm_vmm_desc
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gf100_vmm_desc_17_17[] = {
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{ LPT, 10, 8, 0x1000, &gf100_vmm_pgt },
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{ PGD, 13, 8, 0x1000, &gf100_vmm_pgd },
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{}
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};
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static const struct nvkm_vmm_desc
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gf100_vmm_desc_16_12[] = {
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{ SPT, 14, 8, 0x1000, &gf100_vmm_pgt },
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{ PGD, 14, 8, 0x1000, &gf100_vmm_pgd },
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{}
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};
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static const struct nvkm_vmm_desc
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gf100_vmm_desc_16_16[] = {
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{ LPT, 10, 8, 0x1000, &gf100_vmm_pgt },
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{ PGD, 14, 8, 0x1000, &gf100_vmm_pgd },
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{}
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};
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void
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gf100_vmm_invalidate_pdb(struct nvkm_vmm *vmm, u64 addr)
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{
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struct nvkm_device *device = vmm->mmu->subdev.device;
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nvkm_wr32(device, 0x100cb8, addr);
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}
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void
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gf100_vmm_invalidate(struct nvkm_vmm *vmm, u32 type)
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{
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struct nvkm_device *device = vmm->mmu->subdev.device;
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struct nvkm_mmu_pt *pd = vmm->pd->pt[0];
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u64 addr = 0;
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mutex_lock(&vmm->mmu->mutex);
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/* Looks like maybe a "free flush slots" counter, the
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* faster you write to 0x100cbc to more it decreases.
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*/
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nvkm_msec(device, 2000,
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if (nvkm_rd32(device, 0x100c80) & 0x00ff0000)
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break;
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);
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if (!(type & 0x00000002) /* ALL_PDB. */) {
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switch (nvkm_memory_target(pd->memory)) {
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case NVKM_MEM_TARGET_VRAM: addr |= 0x00000000; break;
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case NVKM_MEM_TARGET_HOST: addr |= 0x00000002; break;
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case NVKM_MEM_TARGET_NCOH: addr |= 0x00000003; break;
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default:
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WARN_ON(1);
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break;
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}
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addr |= (vmm->pd->pt[0]->addr >> 12) << 4;
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vmm->func->invalidate_pdb(vmm, addr);
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}
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nvkm_wr32(device, 0x100cbc, 0x80000000 | type);
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/* Wait for flush to be queued? */
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nvkm_msec(device, 2000,
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if (nvkm_rd32(device, 0x100c80) & 0x00008000)
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break;
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);
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mutex_unlock(&vmm->mmu->mutex);
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}
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void
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gf100_vmm_flush(struct nvkm_vmm *vmm, int depth)
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{
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u32 type = 0x00000001; /* PAGE_ALL */
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if (atomic_read(&vmm->engref[NVKM_SUBDEV_BAR]))
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type |= 0x00000004; /* HUB_ONLY */
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gf100_vmm_invalidate(vmm, type);
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}
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int
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gf100_vmm_valid(struct nvkm_vmm *vmm, void *argv, u32 argc,
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struct nvkm_vmm_map *map)
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{
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const enum nvkm_memory_target target = nvkm_memory_target(map->memory);
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const struct nvkm_vmm_page *page = map->page;
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const bool gm20x = page->desc->func->sparse != NULL;
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union {
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struct gf100_vmm_map_vn vn;
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struct gf100_vmm_map_v0 v0;
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} *args = argv;
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struct nvkm_device *device = vmm->mmu->subdev.device;
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struct nvkm_memory *memory = map->memory;
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u8 kind, kind_inv, priv, ro, vol;
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int kindn, aper, ret = -ENOSYS;
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const u8 *kindm;
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map->next = (1 << page->shift) >> 8;
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map->type = map->ctag = 0;
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if (!(ret = nvif_unpack(ret, &argv, &argc, args->v0, 0, 0, false))) {
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vol = !!args->v0.vol;
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ro = !!args->v0.ro;
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priv = !!args->v0.priv;
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kind = args->v0.kind;
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} else
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if (!(ret = nvif_unvers(ret, &argv, &argc, args->vn))) {
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vol = target == NVKM_MEM_TARGET_HOST;
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ro = 0;
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priv = 0;
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kind = 0x00;
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} else {
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VMM_DEBUG(vmm, "args");
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return ret;
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}
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aper = vmm->func->aper(target);
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if (WARN_ON(aper < 0))
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return aper;
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kindm = vmm->mmu->func->kind(vmm->mmu, &kindn, &kind_inv);
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if (kind >= kindn || kindm[kind] == kind_inv) {
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VMM_DEBUG(vmm, "kind %02x", kind);
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return -EINVAL;
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}
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if (kindm[kind] != kind) {
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u32 comp = (page->shift == 16 && !gm20x) ? 16 : 17;
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u32 tags = ALIGN(nvkm_memory_size(memory), 1 << 17) >> comp;
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if (aper != 0 || !(page->type & NVKM_VMM_PAGE_COMP)) {
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VMM_DEBUG(vmm, "comp %d %02x", aper, page->type);
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return -EINVAL;
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}
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ret = nvkm_memory_tags_get(memory, device, tags,
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nvkm_ltc_tags_clear,
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&map->tags);
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if (ret) {
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VMM_DEBUG(vmm, "comp %d", ret);
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return ret;
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}
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if (map->tags->mn) {
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u64 tags = map->tags->mn->offset + (map->offset >> 17);
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if (page->shift == 17 || !gm20x) {
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map->type |= tags << 44;
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map->ctag |= 1ULL << 44;
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map->next |= 1ULL << 44;
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} else {
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map->ctag |= tags << 1 | 1;
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}
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} else {
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kind = kindm[kind];
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}
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}
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map->type |= BIT(0);
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map->type |= (u64)priv << 1;
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map->type |= (u64) ro << 2;
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map->type |= (u64) vol << 32;
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map->type |= (u64)aper << 33;
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map->type |= (u64)kind << 36;
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return 0;
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}
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int
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gf100_vmm_aper(enum nvkm_memory_target target)
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{
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switch (target) {
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case NVKM_MEM_TARGET_VRAM: return 0;
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case NVKM_MEM_TARGET_HOST: return 2;
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case NVKM_MEM_TARGET_NCOH: return 3;
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default:
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return -EINVAL;
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}
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}
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void
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gf100_vmm_part(struct nvkm_vmm *vmm, struct nvkm_memory *inst)
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{
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nvkm_fo64(inst, 0x0200, 0x00000000, 2);
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}
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int
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gf100_vmm_join_(struct nvkm_vmm *vmm, struct nvkm_memory *inst, u64 base)
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{
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struct nvkm_mmu_pt *pd = vmm->pd->pt[0];
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switch (nvkm_memory_target(pd->memory)) {
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case NVKM_MEM_TARGET_VRAM: base |= 0ULL << 0; break;
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case NVKM_MEM_TARGET_HOST: base |= 2ULL << 0;
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base |= BIT_ULL(2) /* VOL. */;
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break;
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case NVKM_MEM_TARGET_NCOH: base |= 3ULL << 0; break;
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default:
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WARN_ON(1);
|
||
|
|
return -EINVAL;
|
||
|
|
}
|
||
|
|
base |= pd->addr;
|
||
|
|
|
||
|
|
nvkm_kmap(inst);
|
||
|
|
nvkm_wo64(inst, 0x0200, base);
|
||
|
|
nvkm_wo64(inst, 0x0208, vmm->limit - 1);
|
||
|
|
nvkm_done(inst);
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
int
|
||
|
|
gf100_vmm_join(struct nvkm_vmm *vmm, struct nvkm_memory *inst)
|
||
|
|
{
|
||
|
|
return gf100_vmm_join_(vmm, inst, 0);
|
||
|
|
}
|
||
|
|
|
||
|
|
static const struct nvkm_vmm_func
|
||
|
|
gf100_vmm_17 = {
|
||
|
|
.join = gf100_vmm_join,
|
||
|
|
.part = gf100_vmm_part,
|
||
|
|
.aper = gf100_vmm_aper,
|
||
|
|
.valid = gf100_vmm_valid,
|
||
|
|
.flush = gf100_vmm_flush,
|
||
|
|
.invalidate_pdb = gf100_vmm_invalidate_pdb,
|
||
|
|
.page = {
|
||
|
|
{ 17, &gf100_vmm_desc_17_17[0], NVKM_VMM_PAGE_xVxC },
|
||
|
|
{ 12, &gf100_vmm_desc_17_12[0], NVKM_VMM_PAGE_xVHx },
|
||
|
|
{}
|
||
|
|
}
|
||
|
|
};
|
||
|
|
|
||
|
|
static const struct nvkm_vmm_func
|
||
|
|
gf100_vmm_16 = {
|
||
|
|
.join = gf100_vmm_join,
|
||
|
|
.part = gf100_vmm_part,
|
||
|
|
.aper = gf100_vmm_aper,
|
||
|
|
.valid = gf100_vmm_valid,
|
||
|
|
.flush = gf100_vmm_flush,
|
||
|
|
.invalidate_pdb = gf100_vmm_invalidate_pdb,
|
||
|
|
.page = {
|
||
|
|
{ 16, &gf100_vmm_desc_16_16[0], NVKM_VMM_PAGE_xVxC },
|
||
|
|
{ 12, &gf100_vmm_desc_16_12[0], NVKM_VMM_PAGE_xVHx },
|
||
|
|
{}
|
||
|
|
}
|
||
|
|
};
|
||
|
|
|
||
|
|
int
|
||
|
|
gf100_vmm_new_(const struct nvkm_vmm_func *func_16,
|
||
|
|
const struct nvkm_vmm_func *func_17,
|
||
|
|
struct nvkm_mmu *mmu, bool managed, u64 addr, u64 size,
|
||
|
|
void *argv, u32 argc, struct lock_class_key *key,
|
||
|
|
const char *name, struct nvkm_vmm **pvmm)
|
||
|
|
{
|
||
|
|
switch (mmu->subdev.device->fb->page) {
|
||
|
|
case 16: return nv04_vmm_new_(func_16, mmu, 0, managed, addr, size,
|
||
|
|
argv, argc, key, name, pvmm);
|
||
|
|
case 17: return nv04_vmm_new_(func_17, mmu, 0, managed, addr, size,
|
||
|
|
argv, argc, key, name, pvmm);
|
||
|
|
default:
|
||
|
|
WARN_ON(1);
|
||
|
|
return -EINVAL;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
int
|
||
|
|
gf100_vmm_new(struct nvkm_mmu *mmu, bool managed, u64 addr, u64 size,
|
||
|
|
void *argv, u32 argc, struct lock_class_key *key,
|
||
|
|
const char *name, struct nvkm_vmm **pvmm)
|
||
|
|
{
|
||
|
|
return gf100_vmm_new_(&gf100_vmm_16, &gf100_vmm_17, mmu, managed, addr,
|
||
|
|
size, argv, argc, key, name, pvmm);
|
||
|
|
}
|