232 lines
6.4 KiB
C
232 lines
6.4 KiB
C
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/*
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* Copyright 2019 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include "priv.h"
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#include <core/firmware.h>
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#include <core/memory.h>
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#include <subdev/gsp.h>
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#include <subdev/pmu.h>
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#include <engine/sec2.h>
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#include <nvfw/acr.h>
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static int
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tu102_acr_init(struct nvkm_acr *acr)
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{
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int ret = nvkm_acr_hsf_boot(acr, "AHESASC");
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if (ret)
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return ret;
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return nvkm_acr_hsf_boot(acr, "ASB");
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}
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static int
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tu102_acr_wpr_build(struct nvkm_acr *acr, struct nvkm_acr_lsf *rtos)
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{
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struct nvkm_acr_lsfw *lsfw;
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u32 offset = 0;
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int ret;
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/*XXX: shared sub-WPR headers, fill terminator for now. */
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nvkm_wo32(acr->wpr, 0x200, 0xffffffff);
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/* Fill per-LSF structures. */
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list_for_each_entry(lsfw, &acr->lsfw, head) {
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struct lsf_signature_v1 *sig = (void *)lsfw->sig->data;
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struct wpr_header_v1 hdr = {
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.falcon_id = lsfw->id,
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.lsb_offset = lsfw->offset.lsb,
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.bootstrap_owner = NVKM_ACR_LSF_GSPLITE,
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.lazy_bootstrap = 1,
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.bin_version = sig->version,
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.status = WPR_HEADER_V1_STATUS_COPY,
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};
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/* Write WPR header. */
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nvkm_wobj(acr->wpr, offset, &hdr, sizeof(hdr));
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offset += sizeof(hdr);
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/* Write LSB header. */
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ret = gp102_acr_wpr_build_lsb(acr, lsfw);
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if (ret)
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return ret;
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/* Write ucode image. */
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nvkm_wobj(acr->wpr, lsfw->offset.img,
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lsfw->img.data,
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lsfw->img.size);
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/* Write bootloader data. */
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lsfw->func->bld_write(acr, lsfw->offset.bld, lsfw);
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}
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/* Finalise WPR. */
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nvkm_wo32(acr->wpr, offset, WPR_HEADER_V1_FALCON_ID_INVALID);
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return 0;
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}
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static int
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tu102_acr_hsfw_boot(struct nvkm_acr *acr, struct nvkm_acr_hsf *hsf)
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{
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return gm200_acr_hsfw_boot(acr, hsf, 0, 0);
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}
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static int
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tu102_acr_hsfw_nofw(struct nvkm_acr *acr, const char *bl, const char *fw,
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const char *name, int version,
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const struct nvkm_acr_hsf_fwif *fwif)
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{
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return 0;
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}
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MODULE_FIRMWARE("nvidia/tu102/acr/unload_bl.bin");
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MODULE_FIRMWARE("nvidia/tu102/acr/ucode_unload.bin");
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MODULE_FIRMWARE("nvidia/tu104/acr/unload_bl.bin");
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MODULE_FIRMWARE("nvidia/tu104/acr/ucode_unload.bin");
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MODULE_FIRMWARE("nvidia/tu106/acr/unload_bl.bin");
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MODULE_FIRMWARE("nvidia/tu106/acr/ucode_unload.bin");
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MODULE_FIRMWARE("nvidia/tu116/acr/unload_bl.bin");
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MODULE_FIRMWARE("nvidia/tu116/acr/ucode_unload.bin");
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MODULE_FIRMWARE("nvidia/tu117/acr/unload_bl.bin");
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MODULE_FIRMWARE("nvidia/tu117/acr/ucode_unload.bin");
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static const struct nvkm_acr_hsf_fwif
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tu102_acr_unload_fwif[] = {
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{ 0, nvkm_acr_hsfw_load, &gp108_acr_unload_0 },
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{ -1, tu102_acr_hsfw_nofw },
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{}
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};
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static int
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tu102_acr_asb_load(struct nvkm_acr *acr, struct nvkm_acr_hsfw *hsfw)
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{
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return gm200_acr_hsfw_load(acr, hsfw, &acr->subdev.device->gsp->falcon);
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}
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static const struct nvkm_acr_hsf_func
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tu102_acr_asb_0 = {
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.load = tu102_acr_asb_load,
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.boot = tu102_acr_hsfw_boot,
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.bld = gp108_acr_hsfw_bld,
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};
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MODULE_FIRMWARE("nvidia/tu102/acr/ucode_asb.bin");
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MODULE_FIRMWARE("nvidia/tu104/acr/ucode_asb.bin");
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MODULE_FIRMWARE("nvidia/tu106/acr/ucode_asb.bin");
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MODULE_FIRMWARE("nvidia/tu116/acr/ucode_asb.bin");
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MODULE_FIRMWARE("nvidia/tu117/acr/ucode_asb.bin");
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static const struct nvkm_acr_hsf_fwif
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tu102_acr_asb_fwif[] = {
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{ 0, nvkm_acr_hsfw_load, &tu102_acr_asb_0 },
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{ -1, tu102_acr_hsfw_nofw },
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{}
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};
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static const struct nvkm_acr_hsf_func
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tu102_acr_ahesasc_0 = {
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.load = gp102_acr_load_load,
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.boot = tu102_acr_hsfw_boot,
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.bld = gp108_acr_hsfw_bld,
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};
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MODULE_FIRMWARE("nvidia/tu102/acr/bl.bin");
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MODULE_FIRMWARE("nvidia/tu102/acr/ucode_ahesasc.bin");
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MODULE_FIRMWARE("nvidia/tu104/acr/bl.bin");
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MODULE_FIRMWARE("nvidia/tu104/acr/ucode_ahesasc.bin");
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MODULE_FIRMWARE("nvidia/tu106/acr/bl.bin");
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MODULE_FIRMWARE("nvidia/tu106/acr/ucode_ahesasc.bin");
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MODULE_FIRMWARE("nvidia/tu116/acr/bl.bin");
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MODULE_FIRMWARE("nvidia/tu116/acr/ucode_ahesasc.bin");
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MODULE_FIRMWARE("nvidia/tu117/acr/bl.bin");
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MODULE_FIRMWARE("nvidia/tu117/acr/ucode_ahesasc.bin");
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static const struct nvkm_acr_hsf_fwif
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tu102_acr_ahesasc_fwif[] = {
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{ 0, nvkm_acr_hsfw_load, &tu102_acr_ahesasc_0 },
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{ -1, tu102_acr_hsfw_nofw },
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{}
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};
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static const struct nvkm_acr_func
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tu102_acr = {
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.ahesasc = tu102_acr_ahesasc_fwif,
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.asb = tu102_acr_asb_fwif,
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.unload = tu102_acr_unload_fwif,
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.wpr_parse = gp102_acr_wpr_parse,
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.wpr_layout = gp102_acr_wpr_layout,
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.wpr_alloc = gp102_acr_wpr_alloc,
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.wpr_patch = gp102_acr_wpr_patch,
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.wpr_build = tu102_acr_wpr_build,
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.wpr_check = gm200_acr_wpr_check,
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.init = tu102_acr_init,
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};
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static int
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tu102_acr_load(struct nvkm_acr *acr, int version,
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const struct nvkm_acr_fwif *fwif)
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{
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struct nvkm_subdev *subdev = &acr->subdev;
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const struct nvkm_acr_hsf_fwif *hsfwif;
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hsfwif = nvkm_firmware_load(subdev, fwif->func->ahesasc, "AcrAHESASC",
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acr, "acr/bl", "acr/ucode_ahesasc",
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"AHESASC");
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if (IS_ERR(hsfwif))
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return PTR_ERR(hsfwif);
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hsfwif = nvkm_firmware_load(subdev, fwif->func->asb, "AcrASB",
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acr, "acr/bl", "acr/ucode_asb", "ASB");
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if (IS_ERR(hsfwif))
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return PTR_ERR(hsfwif);
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hsfwif = nvkm_firmware_load(subdev, fwif->func->unload, "AcrUnload",
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acr, "acr/unload_bl", "acr/ucode_unload",
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"unload");
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if (IS_ERR(hsfwif))
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return PTR_ERR(hsfwif);
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return 0;
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}
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static const struct nvkm_acr_fwif
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tu102_acr_fwif[] = {
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{ 0, tu102_acr_load, &tu102_acr },
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{ -1, gm200_acr_nofw, &gm200_acr },
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{}
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};
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int
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tu102_acr_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
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struct nvkm_acr **pacr)
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{
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return nvkm_acr_new_(tu102_acr_fwif, device, type, inst, pacr);
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}
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