60 lines
2.4 KiB
C
60 lines
2.4 KiB
C
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/*
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* Copyright 2007 Matthieu CASTET <castet.matthieu@free.fr>
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragr) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include "nv10.h"
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static const struct nvkm_gr_func
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nv17_gr = {
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.init = nv10_gr_init,
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.intr = nv10_gr_intr,
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.tile = nv10_gr_tile,
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.chan_new = nv10_gr_chan_new,
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.sclass = {
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{ -1, -1, 0x0012, &nv04_gr_object }, /* beta1 */
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{ -1, -1, 0x0019, &nv04_gr_object }, /* clip */
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{ -1, -1, 0x0030, &nv04_gr_object }, /* null */
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{ -1, -1, 0x0039, &nv04_gr_object }, /* m2mf */
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{ -1, -1, 0x0043, &nv04_gr_object }, /* rop */
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{ -1, -1, 0x0044, &nv04_gr_object }, /* pattern */
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{ -1, -1, 0x004a, &nv04_gr_object }, /* gdi */
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{ -1, -1, 0x0052, &nv04_gr_object }, /* swzsurf */
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{ -1, -1, 0x005f, &nv04_gr_object }, /* blit */
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{ -1, -1, 0x0062, &nv04_gr_object }, /* surf2d */
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{ -1, -1, 0x0072, &nv04_gr_object }, /* beta4 */
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{ -1, -1, 0x0089, &nv04_gr_object }, /* sifm */
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{ -1, -1, 0x008a, &nv04_gr_object }, /* ifc */
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{ -1, -1, 0x009f, &nv04_gr_object }, /* blit */
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{ -1, -1, 0x0093, &nv04_gr_object }, /* surf3d */
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{ -1, -1, 0x0094, &nv04_gr_object }, /* ttri */
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{ -1, -1, 0x0095, &nv04_gr_object }, /* mtri */
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{ -1, -1, 0x0099, &nv04_gr_object },
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{}
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}
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};
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int
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nv17_gr_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_gr **pgr)
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{
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return nv10_gr_new_(&nv17_gr, device, type, inst, pgr);
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}
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