437 lines
10 KiB
Plaintext
437 lines
10 KiB
Plaintext
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
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*/
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/dts-v1/;
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#include "omap34xx.dtsi"
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/ {
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model = "TI OMAP3 BeagleBoard";
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compatible = "ti,omap3-beagle", "ti,omap3430", "ti,omap3";
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cpus {
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cpu@0 {
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cpu0-supply = <&vcc>;
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};
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};
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memory@80000000 {
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device_type = "memory";
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reg = <0x80000000 0x10000000>; /* 256 MB */
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};
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aliases {
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display0 = &dvi0;
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display1 = &tv0;
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};
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leds {
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compatible = "gpio-leds";
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pmu_stat {
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label = "beagleboard::pmu_stat";
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gpios = <&twl_gpio 19 GPIO_ACTIVE_HIGH>; /* LEDB */
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};
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heartbeat {
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label = "beagleboard::usr0";
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gpios = <&gpio5 22 GPIO_ACTIVE_HIGH>; /* 150 -> D6 LED */
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linux,default-trigger = "heartbeat";
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};
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mmc {
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label = "beagleboard::usr1";
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gpios = <&gpio5 21 GPIO_ACTIVE_HIGH>; /* 149 -> D7 LED */
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linux,default-trigger = "mmc0";
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};
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};
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/* HS USB Port 2 Power */
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hsusb2_power: hsusb2_power_reg {
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compatible = "regulator-fixed";
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regulator-name = "hsusb2_vbus";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&twl_gpio 18 GPIO_ACTIVE_HIGH>; /* GPIO LEDA */
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startup-delay-us = <70000>;
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};
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/* HS USB Host PHY on PORT 2 */
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hsusb2_phy: hsusb2_phy {
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compatible = "usb-nop-xceiv";
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reset-gpios = <&gpio5 19 GPIO_ACTIVE_LOW>; /* gpio_147 */
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vcc-supply = <&hsusb2_power>;
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#phy-cells = <0>;
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};
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sound {
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compatible = "ti,omap-twl4030";
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ti,model = "omap3beagle";
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ti,mcbsp = <&mcbsp2>;
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};
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gpio_keys {
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compatible = "gpio-keys";
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user {
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label = "user";
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gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
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linux,code = <0x114>;
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wakeup-source;
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};
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};
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tfp410: encoder0 {
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compatible = "ti,tfp410";
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powerdown-gpios = <&gpio6 10 GPIO_ACTIVE_LOW>; /* gpio_170 */
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pinctrl-names = "default";
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pinctrl-0 = <&tfp410_pins>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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tfp410_in: endpoint {
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remote-endpoint = <&dpi_out>;
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};
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};
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port@1 {
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reg = <1>;
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tfp410_out: endpoint {
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remote-endpoint = <&dvi_connector_in>;
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};
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};
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};
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};
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dvi0: connector0 {
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compatible = "dvi-connector";
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label = "dvi";
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digital;
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ddc-i2c-bus = <&i2c3>;
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port {
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dvi_connector_in: endpoint {
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remote-endpoint = <&tfp410_out>;
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};
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};
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};
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tv0: connector1 {
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compatible = "svideo-connector";
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label = "tv";
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port {
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tv_connector_in: endpoint {
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remote-endpoint = <&venc_out>;
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};
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};
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};
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etb@540000000 {
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compatible = "arm,coresight-etb10", "arm,primecell";
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reg = <0x5401b000 0x1000>;
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clocks = <&emu_src_ck>;
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clock-names = "apb_pclk";
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in-ports {
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port {
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etb_in: endpoint {
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remote-endpoint = <&etm_out>;
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};
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};
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};
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};
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etm@54010000 {
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compatible = "arm,coresight-etm3x", "arm,primecell";
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reg = <0x54010000 0x1000>;
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clocks = <&emu_src_ck>;
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clock-names = "apb_pclk";
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out-ports {
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port {
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etm_out: endpoint {
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remote-endpoint = <&etb_in>;
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};
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};
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};
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};
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};
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&omap3_pmx_wkup {
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gpio1_pins: pinmux_gpio1_pins {
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pinctrl-single,pins = <
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OMAP3_WKUP_IOPAD(0x2a14, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE4) /* sys_boot5.gpio_7 */
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>;
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};
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};
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&omap3_pmx_core {
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pinctrl-names = "default";
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pinctrl-0 = <
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&hsusb2_pins
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>;
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hsusb2_pins: pinmux_hsusb2_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi1_cs3.hsusb2_data2 */
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OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_clk.hsusb2_data7 */
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OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_simo.hsusb2_data4 */
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OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_somi.hsusb2_data5 */
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OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs0.hsusb2_data6 */
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OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs1.hsusb2_data3 */
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>;
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};
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uart3_pins: pinmux_uart3_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | PIN_OFF_WAKEUPENABLE | MUX_MODE0) /* uart3_rx_irrx.uart3_rx_irrx */
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OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx_irtx.uart3_tx_irtx */
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>;
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};
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tfp410_pins: pinmux_tfp410_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x21c6, PIN_OUTPUT | MUX_MODE4) /* hdq_sio.gpio_170 */
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>;
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};
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dss_dpi_pins: pinmux_dss_dpi_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
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OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
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OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
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OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */
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OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */
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OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */
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OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */
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OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0) /* dss_data3.dss_data3 */
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OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0) /* dss_data4.dss_data4 */
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OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0) /* dss_data5.dss_data5 */
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OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */
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OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */
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OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */
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OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */
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OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */
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OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */
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OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */
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OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */
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OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */
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OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */
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OMAP3_CORE1_IOPAD(0x20fc, PIN_OUTPUT | MUX_MODE0) /* dss_data16.dss_data16 */
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OMAP3_CORE1_IOPAD(0x20fe, PIN_OUTPUT | MUX_MODE0) /* dss_data17.dss_data17 */
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OMAP3_CORE1_IOPAD(0x2100, PIN_OUTPUT | MUX_MODE0) /* dss_data18.dss_data18 */
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OMAP3_CORE1_IOPAD(0x2102, PIN_OUTPUT | MUX_MODE0) /* dss_data19.dss_data19 */
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OMAP3_CORE1_IOPAD(0x2104, PIN_OUTPUT | MUX_MODE0) /* dss_data20.dss_data20 */
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OMAP3_CORE1_IOPAD(0x2106, PIN_OUTPUT | MUX_MODE0) /* dss_data21.dss_data21 */
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OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE0) /* dss_data22.dss_data22 */
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OMAP3_CORE1_IOPAD(0x210a, PIN_OUTPUT | MUX_MODE0) /* dss_data23.dss_data23 */
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>;
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};
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};
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&omap3_pmx_core2 {
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pinctrl-names = "default";
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pinctrl-0 = <
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&hsusb2_2_pins
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>;
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hsusb2_2_pins: pinmux_hsusb2_2_pins {
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pinctrl-single,pins = <
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OMAP3430_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3) /* etk_d10.hsusb2_clk */
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OMAP3430_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3) /* etk_d11.hsusb2_stp */
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OMAP3430_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d12.hsusb2_dir */
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OMAP3430_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d13.hsusb2_nxt */
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OMAP3430_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d14.hsusb2_data0 */
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OMAP3430_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d15.hsusb2_data1 */
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>;
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};
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};
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&i2c1 {
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clock-frequency = <2600000>;
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twl: twl@48 {
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reg = <0x48>;
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interrupts = <7>; /* SYS_NIRQ cascaded to intc */
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interrupt-parent = <&intc>;
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twl_audio: audio {
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compatible = "ti,twl4030-audio";
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codec {
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};
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};
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};
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};
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#include "twl4030.dtsi"
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#include "twl4030_omap3.dtsi"
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&i2c3 {
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clock-frequency = <100000>;
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};
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&mmc1 {
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vmmc-supply = <&vmmc1>;
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vqmmc-supply = <&vsim>;
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bus-width = <8>;
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};
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&mmc2 {
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status = "disabled";
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};
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&mmc3 {
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status = "disabled";
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};
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&usbhshost {
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port2-mode = "ehci-phy";
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};
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&usbhsehci {
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phys = <0 &hsusb2_phy>;
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};
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&twl_gpio {
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ti,use-leds;
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/* pullups: BIT(1) */
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ti,pullups = <0x000002>;
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/*
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* pulldowns:
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* BIT(2), BIT(6), BIT(7), BIT(8), BIT(13)
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* BIT(15), BIT(16), BIT(17)
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*/
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ti,pulldowns = <0x03a1c4>;
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};
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&uart3 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart3_pins>;
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interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
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};
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&gpio1 {
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pinctrl-names = "default";
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pinctrl-0 = <&gpio1_pins>;
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};
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&usb_otg_hs {
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interface-type = <0>;
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usb-phy = <&usb2_phy>;
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phys = <&usb2_phy>;
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phy-names = "usb2-phy";
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mode = <3>;
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power = <50>;
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};
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&vaux2 {
|
||
|
|
regulator-name = "vdd_ehci";
|
||
|
|
regulator-min-microvolt = <1800000>;
|
||
|
|
regulator-max-microvolt = <1800000>;
|
||
|
|
regulator-always-on;
|
||
|
|
};
|
||
|
|
|
||
|
|
&mcbsp2 {
|
||
|
|
status = "okay";
|
||
|
|
};
|
||
|
|
|
||
|
|
/* Needed to power the DPI pins */
|
||
|
|
&vpll2 {
|
||
|
|
regulator-always-on;
|
||
|
|
};
|
||
|
|
|
||
|
|
&dss {
|
||
|
|
status = "okay";
|
||
|
|
|
||
|
|
pinctrl-names = "default";
|
||
|
|
pinctrl-0 = <&dss_dpi_pins>;
|
||
|
|
|
||
|
|
port {
|
||
|
|
dpi_out: endpoint {
|
||
|
|
remote-endpoint = <&tfp410_in>;
|
||
|
|
data-lines = <24>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
&venc {
|
||
|
|
status = "okay";
|
||
|
|
|
||
|
|
vdda-supply = <&vdac>;
|
||
|
|
|
||
|
|
port {
|
||
|
|
venc_out: endpoint {
|
||
|
|
remote-endpoint = <&tv_connector_in>;
|
||
|
|
ti,channels = <2>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
&gpmc {
|
||
|
|
status = "okay";
|
||
|
|
ranges = <0 0 0x30000000 0x1000000>; /* CS0 space, 16MB */
|
||
|
|
|
||
|
|
/* Chip select 0 */
|
||
|
|
nand@0,0 {
|
||
|
|
compatible = "ti,omap2-nand";
|
||
|
|
reg = <0 0 4>; /* NAND I/O window, 4 bytes */
|
||
|
|
interrupt-parent = <&gpmc>;
|
||
|
|
interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
|
||
|
|
<1 IRQ_TYPE_NONE>; /* termcount */
|
||
|
|
ti,nand-ecc-opt = "ham1";
|
||
|
|
rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
|
||
|
|
nand-bus-width = <16>;
|
||
|
|
#address-cells = <1>;
|
||
|
|
#size-cells = <1>;
|
||
|
|
|
||
|
|
gpmc,device-width = <2>;
|
||
|
|
gpmc,cs-on-ns = <0>;
|
||
|
|
gpmc,cs-rd-off-ns = <36>;
|
||
|
|
gpmc,cs-wr-off-ns = <36>;
|
||
|
|
gpmc,adv-on-ns = <6>;
|
||
|
|
gpmc,adv-rd-off-ns = <24>;
|
||
|
|
gpmc,adv-wr-off-ns = <36>;
|
||
|
|
gpmc,oe-on-ns = <6>;
|
||
|
|
gpmc,oe-off-ns = <48>;
|
||
|
|
gpmc,we-on-ns = <6>;
|
||
|
|
gpmc,we-off-ns = <30>;
|
||
|
|
gpmc,rd-cycle-ns = <72>;
|
||
|
|
gpmc,wr-cycle-ns = <72>;
|
||
|
|
gpmc,access-ns = <54>;
|
||
|
|
gpmc,wr-access-ns = <30>;
|
||
|
|
|
||
|
|
partition@0 {
|
||
|
|
label = "X-Loader";
|
||
|
|
reg = <0 0x80000>;
|
||
|
|
};
|
||
|
|
partition@80000 {
|
||
|
|
label = "U-Boot";
|
||
|
|
reg = <0x80000 0x1e0000>;
|
||
|
|
};
|
||
|
|
partition@1c0000 {
|
||
|
|
label = "U-Boot Env";
|
||
|
|
reg = <0x260000 0x20000>;
|
||
|
|
};
|
||
|
|
partition@280000 {
|
||
|
|
label = "Kernel";
|
||
|
|
reg = <0x280000 0x400000>;
|
||
|
|
};
|
||
|
|
partition@780000 {
|
||
|
|
label = "Filesystem";
|
||
|
|
reg = <0x680000 0xf980000>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|