67 lines
2.0 KiB
Plaintext
67 lines
2.0 KiB
Plaintext
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# SPDX-License-Identifier: GPL-2.0
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#
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# Kconfig for uClinux(non-paged MM) depend configurations
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# Hyok S. Choi <hyok.choi@samsung.com>
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#
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config SET_MEM_PARAM
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bool "Set flash/sdram size and base addr"
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help
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Say Y to manually set the base addresses and sizes.
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otherwise, the default values are assigned.
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config DRAM_BASE
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hex '(S)DRAM Base Address' if SET_MEM_PARAM
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default 0x00800000
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config DRAM_SIZE
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hex '(S)DRAM SIZE' if SET_MEM_PARAM
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default 0x00800000
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config FLASH_MEM_BASE
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hex 'FLASH Base Address' if SET_MEM_PARAM
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depends on CPU_ARM740T || CPU_ARM946E || CPU_ARM940T
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default 0x00400000
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config FLASH_SIZE
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hex 'FLASH Size' if SET_MEM_PARAM
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depends on CPU_ARM740T || CPU_ARM946E || CPU_ARM940T
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default 0x00400000
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config PROCESSOR_ID
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hex 'Hard wire the processor ID'
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default 0x00007700
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depends on !(CPU_CP15 || CPU_V7M)
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help
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If processor has no CP15 register, this processor ID is
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used instead of the auto-probing which utilizes the register.
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config REMAP_VECTORS_TO_RAM
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bool 'Install vectors to the beginning of RAM'
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help
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The kernel needs to change the hardware exception vectors.
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In nommu mode, the hardware exception vectors are normally
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placed at address 0x00000000. However, this region may be
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occupied by read-only memory depending on H/W design.
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If the region contains read-write memory, say 'n' here.
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If your CPU provides a remap facility which allows the exception
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vectors to be mapped to writable memory, say 'n' here.
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Otherwise, say 'y' here. In this case, the kernel will require
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external support to redirect the hardware exception vectors to
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the writable versions located at DRAM_BASE.
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config ARM_MPU
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bool 'Use the ARM v7 PMSA Compliant MPU'
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depends on CPU_V7 || CPU_V7M
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default y if CPU_V7
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help
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Some ARM systems without an MMU have instead a Memory Protection
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Unit (MPU) that defines the type and permissions for regions of
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memory.
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If your CPU has an MPU then you should choose 'y' here unless you
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know that you do not want to use the MPU.
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