159 lines
6.7 KiB
Plaintext
159 lines
6.7 KiB
Plaintext
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* USB2 ChipIdea USB controller for ci13xxx
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Required properties:
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- compatible: should be one of:
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"fsl,imx23-usb"
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"fsl,imx27-usb"
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"fsl,imx28-usb"
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"fsl,imx6q-usb"
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"fsl,imx6sl-usb"
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"fsl,imx6sx-usb"
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"fsl,imx6ul-usb"
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"fsl,imx7d-usb"
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"fsl,imx7ulp-usb"
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"lsi,zevio-usb"
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"qcom,ci-hdrc"
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"chipidea,usb2"
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"xlnx,zynq-usb-2.20a"
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"nvidia,tegra20-udc"
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"nvidia,tegra30-udc"
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"nvidia,tegra114-udc"
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"nvidia,tegra124-udc"
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- reg: base address and length of the registers
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- interrupts: interrupt for the USB controller
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Recommended properies:
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- phy_type: the type of the phy connected to the core. Should be one
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of "utmi", "utmi_wide", "ulpi", "serial" or "hsic". Without this
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property the PORTSC register won't be touched.
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- dr_mode: One of "host", "peripheral" or "otg". Defaults to "otg"
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Deprecated properties:
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- usb-phy: phandle for the PHY device. Use "phys" instead.
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- fsl,usbphy: phandle of usb phy that connects to the port. Use "phys" instead.
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Optional properties:
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- clocks: reference to the USB clock
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- phys: reference to the USB PHY
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- phy-names: should be "usb-phy"
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- vbus-supply: reference to the VBUS regulator
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- maximum-speed: limit the maximum connection speed to "full-speed".
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- tpl-support: TPL (Targeted Peripheral List) feature for targeted hosts
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- itc-setting: interrupt threshold control register control, the setting
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should be aligned with ITC bits at register USBCMD.
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- ahb-burst-config: it is vendor dependent, the required value should be
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aligned with AHBBRST at SBUSCFG, the range is from 0x0 to 0x7. This
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property is used to change AHB burst configuration, check the chipidea
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spec for meaning of each value. If this property is not existed, it
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will use the reset value.
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- tx-burst-size-dword: it is vendor dependent, the tx burst size in dword
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(4 bytes), This register represents the maximum length of a the burst
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in 32-bit words while moving data from system memory to the USB
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bus, the value of this property will only take effect if property
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"ahb-burst-config" is set to 0, if this property is missing the reset
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default of the hardware implementation will be used.
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- rx-burst-size-dword: it is vendor dependent, the rx burst size in dword
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(4 bytes), This register represents the maximum length of a the burst
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in 32-bit words while moving data from the USB bus to system memory,
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the value of this property will only take effect if property
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"ahb-burst-config" is set to 0, if this property is missing the reset
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default of the hardware implementation will be used.
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- extcon: phandles to external connector devices. First phandle should point to
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external connector, which provide "USB" cable events, the second should point
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to external connector device, which provide "USB-HOST" cable events. If one
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of the external connector devices is not required, empty <0> phandle should
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be specified.
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- phy-clkgate-delay-us: the delay time (us) between putting the PHY into
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low power mode and gating the PHY clock.
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- non-zero-ttctrl-ttha: after setting this property, the value of register
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ttctrl.ttha will be 0x7f; if not, the value will be 0x0, this is the default
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value. It needs to be very carefully for setting this property, it is
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recommended that consult with your IC engineer before setting this value.
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On the most of chipidea platforms, the "usage_tt" flag at RTL is 0, so this
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property only affects siTD.
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If this property is not set, the max packet size is 1023 bytes, and if
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the total of packet size for pervious transactions are more than 256 bytes,
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it can't accept any transactions within this frame. The use case is single
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transaction, but higher frame rate.
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If this property is set, the max packet size is 188 bytes, it can handle
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more transactions than above case, it can accept transactions until it
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considers the left room size within frame is less than 188 bytes, software
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needs to make sure it does not send more than 90%
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maximum_periodic_data_per_frame. The use case is multiple transactions, but
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less frame rate.
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- mux-controls: The mux control for toggling host/device output of this
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controller. It's expected that a mux state of 0 indicates device mode and a
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mux state of 1 indicates host mode.
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- mux-control-names: Shall be "usb_switch" if mux-controls is specified.
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- pinctrl-names: Names for optional pin modes in "default", "host", "device".
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In case of HSIC-mode, "idle" and "active" pin modes are mandatory. In this
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case, the "idle" state needs to pull down the data and strobe pin
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and the "active" state needs to pull up the strobe pin.
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- pinctrl-n: alternate pin modes
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i.mx specific properties
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- fsl,usbmisc: phandler of non-core register device, with one
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argument that indicate usb controller index
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- disable-over-current: disable over current detect
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- over-current-active-low: over current signal polarity is active low.
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- over-current-active-high: over current signal polarity is active high.
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It's recommended to specify the over current polarity.
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- power-active-high: power signal polarity is active high
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- external-vbus-divider: enables off-chip resistor divider for Vbus
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- samsung,picophy-pre-emp-curr-control: HS Transmitter Pre-Emphasis Current
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Control. This signal controls the amount of current sourced to the
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USB_OTG*_DP and USB_OTG*_DN pins after a J-to-K or K-to-J transition.
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The range is from 0x0 to 0x3, the default value is 0x1.
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Details can refer to TXPREEMPAMPTUNE0 bits of USBNC_n_PHY_CFG1.
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- samsung,picophy-dc-vol-level-adjust: HS DC Voltage Level Adjustment.
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Adjust the high-speed transmitter DC level voltage.
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The range is from 0x0 to 0xf, the default value is 0x3.
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Details can refer to TXVREFTUNE0 bits of USBNC_n_PHY_CFG1.
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Example:
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usb@f7ed0000 {
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compatible = "chipidea,usb2";
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reg = <0xf7ed0000 0x10000>;
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interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&chip CLKID_USB0>;
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phys = <&usb_phy0>;
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phy-names = "usb-phy";
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vbus-supply = <®_usb0_vbus>;
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itc-setting = <0x4>; /* 4 micro-frames */
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/* Incremental burst of unspecified length */
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ahb-burst-config = <0x0>;
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tx-burst-size-dword = <0x10>; /* 64 bytes */
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rx-burst-size-dword = <0x10>;
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extcon = <0>, <&usb_id>;
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phy-clkgate-delay-us = <400>;
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mux-controls = <&usb_switch>;
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mux-control-names = "usb_switch";
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};
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Example for HSIC:
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usb@2184400 {
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compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
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reg = <0x02184400 0x200>;
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interrupts = <0 41 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks IMX6QDL_CLK_USBOH3>;
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fsl,usbphy = <&usbphynop1>;
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fsl,usbmisc = <&usbmisc 2>;
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phy_type = "hsic";
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dr_mode = "host";
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ahb-burst-config = <0x0>;
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tx-burst-size-dword = <0x10>;
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rx-burst-size-dword = <0x10>;
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pinctrl-names = "idle", "active";
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pinctrl-0 = <&pinctrl_usbh2_idle>;
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pinctrl-1 = <&pinctrl_usbh2_active>;
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#address-cells = <1>;
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#size-cells = <0>;
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usbnet: ethernet@1 {
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compatible = "usb424,9730";
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reg = <1>;
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};
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};
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