101 lines
2.6 KiB
YAML
101 lines
2.6 KiB
YAML
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/sound/mt8192-afe-pcm.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Mediatek AFE PCM controller for mt8192
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maintainers:
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- Jiaxin Yu <jiaxin.yu@mediatek.com>
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- Shane Chien <shane.chien@mediatek.com>
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properties:
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compatible:
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const: mediatek,mt8192-audio
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interrupts:
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maxItems: 1
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resets:
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maxItems: 1
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reset-names:
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const: audiosys
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mediatek,apmixedsys:
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$ref: "/schemas/types.yaml#/definitions/phandle"
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description: The phandle of the mediatek apmixedsys controller
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mediatek,infracfg:
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$ref: "/schemas/types.yaml#/definitions/phandle"
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description: The phandle of the mediatek infracfg controller
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mediatek,topckgen:
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$ref: "/schemas/types.yaml#/definitions/phandle"
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description: The phandle of the mediatek topckgen controller
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power-domains:
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maxItems: 1
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clocks:
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items:
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- description: AFE clock
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- description: ADDA DAC clock
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- description: ADDA DAC pre-distortion clock
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- description: audio infra sys clock
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- description: audio infra 26M clock
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clock-names:
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items:
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- const: aud_afe_clk
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- const: aud_dac_clk
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- const: aud_dac_predis_clk
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- const: aud_infra_clk
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- const: aud_infra_26m_clk
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required:
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- compatible
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- interrupts
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- resets
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- reset-names
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- mediatek,apmixedsys
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- mediatek,infracfg
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- mediatek,topckgen
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- power-domains
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- clocks
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- clock-names
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/mt8192-clk.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/power/mt8192-power.h>
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#include <dt-bindings/reset/mt8192-resets.h>
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afe: mt8192-afe-pcm {
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compatible = "mediatek,mt8192-audio";
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interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>;
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resets = <&watchdog MT8192_TOPRGU_AUDIO_SW_RST>;
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reset-names = "audiosys";
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mediatek,apmixedsys = <&apmixedsys>;
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mediatek,infracfg = <&infracfg>;
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mediatek,topckgen = <&topckgen>;
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power-domains = <&scpsys MT8192_POWER_DOMAIN_AUDIO>;
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clocks = <&audsys CLK_AUD_AFE>,
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<&audsys CLK_AUD_DAC>,
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<&audsys CLK_AUD_DAC_PREDIS>,
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<&infracfg CLK_INFRA_AUDIO>,
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<&infracfg CLK_INFRA_AUDIO_26M_B>;
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clock-names = "aud_afe_clk",
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"aud_dac_clk",
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"aud_dac_predis_clk",
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"aud_infra_clk",
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"aud_infra_26m_clk";
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};
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...
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