89 lines
1.9 KiB
YAML
89 lines
1.9 KiB
YAML
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/soc/imx/fsl,imx8mp-hsio-blk-ctrl.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: NXP i.MX8MP HSIO blk-ctrl
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maintainers:
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- Lucas Stach <l.stach@pengutronix.de>
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description:
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The i.MX8MP HSIO blk-ctrl is a top-level peripheral providing access to
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the NoC and ensuring proper power sequencing of the high-speed IO
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(USB an PCIe) peripherals located in the HSIO domain of the SoC.
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properties:
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compatible:
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items:
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- const: fsl,imx8mp-hsio-blk-ctrl
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- const: syscon
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reg:
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maxItems: 1
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'#power-domain-cells':
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const: 1
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power-domains:
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minItems: 6
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maxItems: 6
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power-domain-names:
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items:
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- const: bus
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- const: usb
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- const: usb-phy1
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- const: usb-phy2
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- const: pcie
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- const: pcie-phy
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clocks:
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minItems: 2
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maxItems: 2
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clock-names:
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items:
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- const: usb
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- const: pcie
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interconnects:
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maxItems: 4
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interconnect-names:
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items:
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- const: noc-pcie
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- const: usb1
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- const: usb2
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- const: pcie
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required:
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- compatible
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- reg
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- power-domains
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- power-domain-names
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- clocks
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- clock-names
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/imx8mp-clock.h>
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#include <dt-bindings/power/imx8mp-power.h>
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hsio_blk_ctrl: blk-ctrl@32f10000 {
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compatible = "fsl,imx8mp-hsio-blk-ctrl", "syscon";
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reg = <0x32f10000 0x24>;
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clocks = <&clk IMX8MP_CLK_USB_ROOT>,
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<&clk IMX8MP_CLK_PCIE_ROOT>;
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clock-names = "usb", "pcie";
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power-domains = <&pgc_hsiomix>, <&pgc_hsiomix>,
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<&pgc_usb1_phy>, <&pgc_usb2_phy>,
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<&pgc_hsiomix>, <&pgc_pcie_phy>;
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power-domain-names = "bus", "usb", "usb-phy1",
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"usb-phy2", "pcie", "pcie-phy";
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#power-domain-cells = <1>;
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};
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