358 lines
10 KiB
YAML
358 lines
10 KiB
YAML
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/net/renesas,etheravb.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Renesas Ethernet AVB
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maintainers:
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- Sergei Shtylyov <sergei.shtylyov@gmail.com>
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properties:
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compatible:
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oneOf:
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- items:
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- enum:
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- renesas,etheravb-r8a7742 # RZ/G1H
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- renesas,etheravb-r8a7743 # RZ/G1M
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- renesas,etheravb-r8a7744 # RZ/G1N
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- renesas,etheravb-r8a7745 # RZ/G1E
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- renesas,etheravb-r8a77470 # RZ/G1C
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- renesas,etheravb-r8a7790 # R-Car H2
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- renesas,etheravb-r8a7791 # R-Car M2-W
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- renesas,etheravb-r8a7792 # R-Car V2H
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- renesas,etheravb-r8a7793 # R-Car M2-N
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- renesas,etheravb-r8a7794 # R-Car E2
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- const: renesas,etheravb-rcar-gen2 # R-Car Gen2 and RZ/G1
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- items:
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- enum:
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- renesas,etheravb-r8a774a1 # RZ/G2M
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- renesas,etheravb-r8a774b1 # RZ/G2N
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- renesas,etheravb-r8a774c0 # RZ/G2E
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- renesas,etheravb-r8a774e1 # RZ/G2H
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- renesas,etheravb-r8a7795 # R-Car H3
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- renesas,etheravb-r8a7796 # R-Car M3-W
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- renesas,etheravb-r8a77961 # R-Car M3-W+
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- renesas,etheravb-r8a77965 # R-Car M3-N
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- renesas,etheravb-r8a77970 # R-Car V3M
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- renesas,etheravb-r8a77980 # R-Car V3H
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- renesas,etheravb-r8a77990 # R-Car E3
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- renesas,etheravb-r8a77995 # R-Car D3
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- const: renesas,etheravb-rcar-gen3 # R-Car Gen3 and RZ/G2
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- items:
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- enum:
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- renesas,etheravb-r8a779a0 # R-Car V3U
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- renesas,etheravb-r8a779g0 # R-Car V4H
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- const: renesas,etheravb-rcar-gen4 # R-Car Gen4
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- items:
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- enum:
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- renesas,etheravb-r9a09g011 # RZ/V2M
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- const: renesas,etheravb-rzv2m # RZ/V2M compatible
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- items:
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- enum:
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- renesas,r9a07g043-gbeth # RZ/G2UL
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- renesas,r9a07g044-gbeth # RZ/G2{L,LC}
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- renesas,r9a07g054-gbeth # RZ/V2L
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- const: renesas,rzg2l-gbeth # RZ/{G2L,G2UL,V2L} family
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reg: true
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interrupts: true
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interrupt-names: true
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clocks: true
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clock-names: true
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iommus:
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maxItems: 1
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power-domains:
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maxItems: 1
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resets:
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maxItems: 1
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phy-mode: true
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phy-handle: true
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'#address-cells':
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description: Number of address cells for the MDIO bus.
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const: 1
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'#size-cells':
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description: Number of size cells on the MDIO bus.
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const: 0
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renesas,no-ether-link:
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type: boolean
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description:
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Specify when a board does not provide a proper AVB_LINK signal.
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renesas,ether-link-active-low:
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type: boolean
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description:
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Specify when the AVB_LINK signal is active-low instead of normal
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active-high.
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rx-internal-delay-ps:
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enum: [0, 1800]
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tx-internal-delay-ps:
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enum: [0, 2000]
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patternProperties:
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"^ethernet-phy@[0-9a-f]$":
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type: object
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$ref: ethernet-phy.yaml#
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- power-domains
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- resets
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- phy-mode
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- phy-handle
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- '#address-cells'
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- '#size-cells'
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allOf:
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- $ref: ethernet-controller.yaml#
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- if:
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properties:
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compatible:
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contains:
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enum:
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- renesas,etheravb-rcar-gen2
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- renesas,etheravb-r8a7795
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- renesas,etheravb-r8a7796
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- renesas,etheravb-r8a77961
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- renesas,etheravb-r8a77965
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then:
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properties:
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reg:
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items:
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- description: MAC register block
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- description: Stream buffer
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else:
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properties:
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reg:
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items:
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- description: MAC register block
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- if:
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properties:
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compatible:
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contains:
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enum:
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- renesas,etheravb-rcar-gen2
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- renesas,rzg2l-gbeth
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then:
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properties:
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interrupts:
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minItems: 1
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maxItems: 3
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interrupt-names:
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minItems: 1
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items:
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- const: mux
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- const: fil
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- const: arp_ns
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rx-internal-delay-ps: false
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else:
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if:
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properties:
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compatible:
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contains:
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const: renesas,etheravb-rzv2m
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then:
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properties:
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interrupts:
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minItems: 29
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maxItems: 29
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interrupt-names:
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items:
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pattern: '^(ch(1?)[0-9])|ch20|ch21|dia|dib|err_a|err_b|mgmt_a|mgmt_b|line3$'
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rx-internal-delay-ps: false
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required:
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- interrupt-names
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else:
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properties:
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interrupts:
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minItems: 25
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maxItems: 25
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interrupt-names:
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items:
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pattern: '^ch[0-9]+$'
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required:
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- interrupt-names
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- rx-internal-delay-ps
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- if:
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properties:
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compatible:
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contains:
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enum:
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- renesas,etheravb-r8a774a1
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- renesas,etheravb-r8a774b1
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- renesas,etheravb-r8a774e1
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- renesas,etheravb-r8a7795
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- renesas,etheravb-r8a7796
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- renesas,etheravb-r8a77961
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- renesas,etheravb-r8a77965
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- renesas,etheravb-r8a77970
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- renesas,etheravb-r8a77980
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- renesas,etheravb-rcar-gen4
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then:
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required:
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- tx-internal-delay-ps
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else:
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properties:
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tx-internal-delay-ps: false
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- if:
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properties:
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compatible:
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contains:
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const: renesas,etheravb-r8a77995
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then:
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properties:
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rx-internal-delay-ps:
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const: 1800
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- if:
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properties:
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compatible:
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contains:
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const: renesas,etheravb-r8a77980
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then:
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properties:
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tx-internal-delay-ps:
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const: 2000
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- if:
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properties:
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compatible:
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contains:
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const: renesas,rzg2l-gbeth
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then:
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properties:
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clocks:
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items:
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- description: Main clock
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- description: Register access clock
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- description: Reference clock for RGMII
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clock-names:
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items:
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- const: axi
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- const: chi
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- const: refclk
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else:
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if:
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properties:
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compatible:
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contains:
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const: renesas,etheravb-rzv2m
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then:
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properties:
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clocks:
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items:
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- description: Main clock
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- description: Coherent Hub Interface clock
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- description: gPTP reference clock
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clock-names:
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items:
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- const: axi
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- const: chi
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- const: gptp
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else:
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properties:
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clocks:
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minItems: 1
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items:
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- description: AVB functional clock
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- description: Optional TXC reference clock
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clock-names:
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minItems: 1
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items:
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- const: fck
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- const: refclk
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/r8a7795-cpg-mssr.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/power/r8a7795-sysc.h>
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#include <dt-bindings/gpio/gpio.h>
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aliases {
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ethernet0 = &avb;
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};
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avb: ethernet@e6800000 {
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compatible = "renesas,etheravb-r8a7795",
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"renesas,etheravb-rcar-gen3";
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reg = <0xe6800000 0x800>, <0xe6a00000 0x10000>;
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interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6",
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"ch7", "ch8", "ch9", "ch10", "ch11", "ch12",
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"ch13", "ch14", "ch15", "ch16", "ch17", "ch18",
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"ch19", "ch20", "ch21", "ch22", "ch23", "ch24";
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clocks = <&cpg CPG_MOD 812>;
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clock-names = "fck";
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iommus = <&ipmmu_ds0 16>;
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power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
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resets = <&cpg 812>;
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phy-mode = "rgmii";
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phy-handle = <&phy0>;
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rx-internal-delay-ps = <0>;
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tx-internal-delay-ps = <2000>;
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#address-cells = <1>;
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#size-cells = <0>;
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phy0: ethernet-phy@0 {
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compatible = "ethernet-phy-id0022.1622",
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"ethernet-phy-ieee802.3-c22";
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rxc-skew-ps = <1500>;
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reg = <0>;
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interrupt-parent = <&gpio2>;
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interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
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reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
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};
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};
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