42 lines
897 B
Plaintext
42 lines
897 B
Plaintext
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* Oxford Semiconductor OXNAS NAND Controller
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Please refer to nand-controller.yaml for generic information regarding MTD NAND bindings.
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Required properties:
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- compatible: "oxsemi,ox820-nand"
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- reg: Base address and length for NAND mapped memory.
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Optional Properties:
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- clocks: phandle to the NAND gate clock if needed.
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- resets: phandle to the NAND reset control if needed.
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Example:
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nandc: nand-controller@41000000 {
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compatible = "oxsemi,ox820-nand";
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reg = <0x41000000 0x100000>;
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clocks = <&stdclk CLK_820_NAND>;
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resets = <&reset RESET_NAND>;
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#address-cells = <1>;
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#size-cells = <0>;
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nand@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <1>;
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nand-ecc-mode = "soft";
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nand-ecc-algo = "hamming";
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partition@0 {
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label = "boot";
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reg = <0x00000000 0x00e00000>;
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read-only;
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};
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partition@e00000 {
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label = "ubi";
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reg = <0x00e00000 0x07200000>;
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};
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};
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};
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