93 lines
2.7 KiB
YAML
93 lines
2.7 KiB
YAML
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# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/interrupt-controller/renesas,irqc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: DT bindings for the R-Mobile/R-Car/RZ/G interrupt controller
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maintainers:
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- Geert Uytterhoeven <geert+renesas@glider.be>
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properties:
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compatible:
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items:
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- enum:
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- renesas,irqc-r8a73a4 # R-Mobile APE6
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- renesas,irqc-r8a7742 # RZ/G1H
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- renesas,irqc-r8a7743 # RZ/G1M
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- renesas,irqc-r8a7744 # RZ/G1N
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- renesas,irqc-r8a7745 # RZ/G1E
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- renesas,irqc-r8a77470 # RZ/G1C
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- renesas,irqc-r8a7790 # R-Car H2
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- renesas,irqc-r8a7791 # R-Car M2-W
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- renesas,irqc-r8a7792 # R-Car V2H
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- renesas,irqc-r8a7793 # R-Car M2-N
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- renesas,irqc-r8a7794 # R-Car E2
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- renesas,intc-ex-r8a774a1 # RZ/G2M
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- renesas,intc-ex-r8a774b1 # RZ/G2N
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- renesas,intc-ex-r8a774c0 # RZ/G2E
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- renesas,intc-ex-r8a774e1 # RZ/G2H
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- renesas,intc-ex-r8a7795 # R-Car H3
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- renesas,intc-ex-r8a7796 # R-Car M3-W
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- renesas,intc-ex-r8a77961 # R-Car M3-W+
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- renesas,intc-ex-r8a77965 # R-Car M3-N
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- renesas,intc-ex-r8a77970 # R-Car V3M
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- renesas,intc-ex-r8a77980 # R-Car V3H
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- renesas,intc-ex-r8a77990 # R-Car E3
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- renesas,intc-ex-r8a77995 # R-Car D3
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- renesas,intc-ex-r8a779a0 # R-Car V3U
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- renesas,intc-ex-r8a779g0 # R-Car V4H
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- const: renesas,irqc
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'#interrupt-cells':
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# an interrupt index and flags, as defined in interrupts.txt in
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# this directory
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const: 2
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interrupt-controller: true
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reg:
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maxItems: 1
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interrupts:
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minItems: 1
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maxItems: 32
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clocks:
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maxItems: 1
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power-domains:
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maxItems: 1
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resets:
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maxItems: 1
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required:
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- compatible
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- '#interrupt-cells'
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- interrupt-controller
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- reg
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- interrupts
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- clocks
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/r8a7790-cpg-mssr.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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irqc0: interrupt-controller@e61c0000 {
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compatible = "renesas,irqc-r8a7790", "renesas,irqc";
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#interrupt-cells = <2>;
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interrupt-controller;
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reg = <0xe61c0000 0x200>;
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interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 407>;
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};
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