72 lines
1.6 KiB
YAML
72 lines
1.6 KiB
YAML
|
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||
|
%YAML 1.2
|
||
|
---
|
||
|
$id: http://devicetree.org/schemas/display/bridge/snps,dw-mipi-dsi.yaml#
|
||
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||
|
|
||
|
title: Synopsys DesignWare MIPI DSI host controller
|
||
|
|
||
|
maintainers:
|
||
|
- Philippe CORNU <philippe.cornu@foss.st.com>
|
||
|
|
||
|
description: |
|
||
|
This document defines device tree properties for the Synopsys DesignWare MIPI
|
||
|
DSI host controller. It doesn't constitue a device tree binding specification
|
||
|
by itself but is meant to be referenced by platform-specific device tree
|
||
|
bindings.
|
||
|
|
||
|
When referenced from platform device tree bindings the properties defined in
|
||
|
this document are defined as follows. The platform device tree bindings are
|
||
|
responsible for defining whether each property is required or optional.
|
||
|
|
||
|
allOf:
|
||
|
- $ref: ../dsi-controller.yaml#
|
||
|
|
||
|
properties:
|
||
|
reg:
|
||
|
maxItems: 1
|
||
|
|
||
|
clocks:
|
||
|
items:
|
||
|
- description: Module clock
|
||
|
- description: DSI bus clock for either AHB and APB
|
||
|
- description: Pixel clock for the DPI/RGB input
|
||
|
minItems: 2
|
||
|
|
||
|
clock-names:
|
||
|
items:
|
||
|
- const: ref
|
||
|
- const: pclk
|
||
|
- const: px_clk
|
||
|
minItems: 2
|
||
|
|
||
|
resets:
|
||
|
maxItems: 1
|
||
|
|
||
|
reset-names:
|
||
|
const: apb
|
||
|
|
||
|
ports:
|
||
|
$ref: /schemas/graph.yaml#/properties/ports
|
||
|
|
||
|
properties:
|
||
|
port@0:
|
||
|
$ref: /schemas/graph.yaml#/properties/port
|
||
|
description: Input node to receive pixel data.
|
||
|
|
||
|
port@1:
|
||
|
$ref: /schemas/graph.yaml#/properties/port
|
||
|
description: DSI output node to panel.
|
||
|
|
||
|
required:
|
||
|
- port@0
|
||
|
- port@1
|
||
|
|
||
|
required:
|
||
|
- clock-names
|
||
|
- clocks
|
||
|
- ports
|
||
|
- reg
|
||
|
|
||
|
additionalProperties: true
|